A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.

Provided is an SiC composite substrate 10 having a monocrystalline SiC layer 12 on a polycrystalline SiC substrate 11, wherein: some or all of the interface at which the polycrystalline SiC substrate 11 and the monocrystalline SiC layer 12 are in contact is an unmatched interface I.sub.12/11 that is not lattice-matched; the monocrystalline SiC layer 12 has a smooth obverse surface and has, on the side of the interface with the polycrystalline SiC substrate 11, a surface that has more pronounced depressions and projections than the obverse surface; and the close-packed plane (lattice plane 11p) of the crystals of the polycrystalline SiC in the polycrystalline SiC substrate 11 is randomly oriented with reference to the direction of a normal to the obverse surface of the monocrystalline SiC layer 12. The present invention improves the adhesion between the polycrystalline SiC substrate and the monocrystalline SiC layer.

Provided is a SiC composite substrate including a biaxially-oriented SiC layer in which SiC is oriented in both a c-axis direction and an a-axis direction, and a SiC polycrystalline layer provided on one surface of the biaxially-oriented SiC layer. Pores are present in the SiC composite substrate.

Provided is a SiC composite substrate including a biaxially-oriented SiC layer in which SiC is oriented in both a c-axis direction and an a-axis direction, and a SiC polycrystalline layer provided on one surface of the biaxially-oriented SiC layer. A joint interface of the biaxially-oriented SiC layer and the SiC polycrystalline layer has an uneven shape, which has an amount of unevenness of 1 to 200 μm.

A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.

In a step of calculating formation conditions for the second silicon carbide layer, a formation time of the second silicon carbide layer is calculated as a value obtained by multiplying a value obtained by dividing the second thickness by the first thickness, by the first formation time, and a flow rate of a second ammonia gas in a step of forming the second silicon carbide layer by epitaxial growth is calculated as a value obtained by multiplying a value obtained by dividing the second concentration by the first concentration, by the first flow rate.

A electronic device including a stack of a support substrate made of single-crystal SiC having a first surface and of a layer made of single-crystal SiC including a second surface opposite the first surface. The first surface corresponds to a plane of the SiC single crystal of the support substrate and the second surface corresponds to a plane inclined by at least 1° with respect to the plane of the SiC single crystal of the layer.

A method for manufacturing a wide band gap semiconductor device using a substrate of SiC wafer is disclosed. The method includes coating the substrate with a hard mask material, performing lithography to define patterned openings in the hard mask material of the substrate, etching the substrate to form patterned trenches from the defined patterned openings, removing the hard mask using a chemical process from the substrate, cleaning the substrate with the patterned trenches, performing epitaxy on the substrate to form a uniform single crystal layer over the patterned trenches to create a plurality of micro voids, kiss polishing the substrate, performing another epitaxy on the substrate using a fast epitaxial growth process to provide an active device epitaxial layer suitable to fabricate SiC devices, and after fabrication of the SiC devices, severing the plurality of micro voids to extract the SiC devices from the substrate of the SiC wafer.

A production process of a SiC wafer carried out in a same reaction chamber includes forming, on a support, a first SiC layer. The support is separated from the first SiC layer. A second SiC layer is grown on the first SiC layer, which includes introducing into the reaction chamber a precursor in the gaseous phase of a first dopant having a first electrical conductivity to generate a first stress in the second SiC layer, and introducing into the reaction chamber a precursor in the gaseous phase of a second dopant having a second electrical conductivity opposite to the first electrical conductivity, to generate a second stress in the second SiC layer that is opposite to, and balances, the first stress. The SiC wafer is thus without effects of warpage.

A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.