Patent classifications
H01L21/02452
Methods for forming a silicon germanium tin layer and related semiconductor device structures
A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl.sub.4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH.sub.4), and tin tetrachloride (SnCl.sub.4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes: a substrate including a display area and a non-display area; a gate driver disposed on the substrate in the non-display area and including a plurality of stages that generate a gate signal and output the gate signal to the display area; a switching transistor and a driving transistor disposed on the substrate in the display area; and a light emitting diode connected to the driving transistor, wherein each of the plurality of stages may include a plurality of transistors, wherein a channel layer of the driving transistor includes a first oxide semiconductor material, and a channel layer of the plurality of transistors included in each of the plurality of stages includes a second oxide semiconductor material, wherein the first oxide semiconductor material is different from the second oxide semiconductor material, and wherein the second oxide semiconductor material may include tin.
Germanium Nanosheets and Methods of Forming the Same
Devices comprising germanium nanosheets are described herein. Methods of forming such germanium nanosheets and devices including such germanium nanosheets are also described.
Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.
GERMANIUM NANOSHEETS AND METHODS OF FORMING THE SAME
Devices comprising germanium nanosheets are described herein. Methods of forming such germanium nanosheets and devices including such germanium nanosheets are also described.
III-N multichip modules and methods of fabrication
A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.
Formation of epitaxial layers via dislocation filtering
A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.
METHOD FOR DEPOSITING A SEMICONDUCTOR STRUCTURE ON A SURFACE OF A SUBSTRATE AND RELATED SEMICONDUCTOR STRUCTURES
A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method includes forming a fin structure over a substrate; forming a source/drain structure adjoining the fin structure, in which the source/drain structure includes tin; and exposing the source/drain structure to a boron-containing gas to diffuse boron into the source/drain structure to form a doped region in the source/drain structure.
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
The present invention discloses a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes: a substrate; and at least one composition adjusting layer disposed above the substrate; wherein each of the at least one composition adjusting layer is made of a semiconductor compound, the semiconductor compound at least comprises a first element and a second element, and an atomic number of the first element is less than an atomic number of the second element, wherein in each of the at least one composition adjusting layer, along an epitaxial direction of the substrate, an atomic percentage of the first element in a compound composition is gradually decreased at first and then gradually increased, a thickness of a gradual decrease section is greater than a thickness of a gradual increase section.