A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type and forming a first III-nitride layer coupled to the III-nitride substrate. The first III-nitride layer is characterized by a first dopant concentration and the first conductivity type. The method also includes forming a plurality of trenches within the first III-nitride layer and epitaxially regrowing a second III-nitride structure in the trenches. The second III-nitride structure is characterized by a second conductivity type. The method further includes forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions, and epitaxially regrowing a III-nitride gate layer in the recess regions. The III-nitride gate layer is coupled to the second III-nitride structure and the III-nitride gate layer is characterized by the second conductivity type.

A process for manufacturing a silicon carbide device from a body of silicon carbide having a back surface, wherein a first layer of a first metal is formed on the back surface of the body; a second layer of a second metal, different from the first metal, is formed on the first layer to form a multilayer, the first or the second metal being nickel or a nickel alloy and forming a nickel-based layer, another of the first or the second metal being a metal X, capable to form stable compounds with carbon and forming an X-based layer; and the multilayer is annealed to form a mixed layer including nickel silicide and at least one of X carbide or a metal X-carbon ternary compound.

A heteroepitaxial semiconductor device includes a bulk semiconductor substrate, a seed layer including a first semiconductor material, the seed layer being arranged at a first side of the bulk semiconductor substrate and including a first side facing the bulk semiconductor substrate, an opposing second side and lateral sides connecting the first and second sides, a separation layer arranged between the bulk semiconductor substrate and the seed layer, a heteroepitaxial structure grown on the second side of the seed layer and including a second semiconductor material, different from the first semiconductor material, and a dielectric material layer arranged on the seed layer and at least partially encapsulating the heteroepitaxial structure, wherein the dielectric material layer also covers the lateral sides of the seed layer.

A heteroepitaxial semiconductor device includes a seed layer including a first semiconductor material, the seed layer including a first side, an opposing second side and lateral sides connecting the first and second sides, a separation layer arranged at the first side of the seed layer, the separation layer including an aperture, a heteroepitaxial structure grown at the first side of the seed layer at least in the aperture and including a second semiconductor material, different from the first semiconductor material, and a first dielectric material layer arranged at the second side of the seed layer and covering the lateral sides of the seed layer.

Methods for treating a thin film made from a conductive or semiconductive material may improve the crystalline quality thereof. Such methods may include: supplying a substrate including, on one of the faces thereof, a thin film of the material; and biased plasma treating the assembly formed by the substrate and the thin film at a given temperature and for a given time, so as to obtain a crystalline reorganization over a depth of the thin film, the biased plasma treatment including an electrical biasing of the thin film and an exposure of the film thus biased to a hydrogen plasma, the biased plasma treatment being implemented at a temperature that is below the melting points of the thin film and of the substrate.

Electric field management techniques in GaN based semiconductors that utilize patterned regions of differing conductivity under the active GaN device, such as a GaN high electron mobility transistor (HEMT), are described. As an example, a patterned layer of oxidized silicon can be formed superjacent a layer of silicon dioxide during or prior to the heteroepitaxy of GaN or another semiconductor material. These techniques can be useful for back-side electric field management because a silicon layer, for example, can be made conductive to act as a back-side field plate.

Exemplary semiconductor structures may include a silicon-containing substrate. The structures may include a layer of a metal nitride overlying the silicon-containing substrate. The structures may include a gallium nitride structure overlying the layer of the metal nitride. The structures may include an oxygen-containing layer disposed between the layer of the metal nitride and the gallium nitride structure.

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The first semiconductor material is substantially defect-free silicon carbide, and the second semiconductor material is silicon. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET, diode, insulated gate bipolar transistor, cluster trench insulated gate bipolar transistor, and thyristor. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

According to one embodiment, a wafer includes a substrate and a crystal layer. The substrate includes a plurality of SiC regions including SiC and an inter-SiC region including Si provided between the SiC regions. The crystal layer includes a first layer, and a first intermediate layer provided between the substrate and the first layer in a first direction. The first layer includes SiC and nitrogen. The first intermediate layer includes SiC and nitrogen. A second concentration of nitrogen in the first intermediate layer is higher than a first concentration of nitrogen in the first layer.

Hydride phase vapor epitaxy (HVPE) growth apparatus, methods and materials and structures grown thereby. An HVPE reactor includes generation, accumulation, and growth zones. A source material for growth of indium nitride is generated and collected inside the reactor. A first reactive gas reacts with an indium source inside the generation zone to produce a first gas product having an indium-containing compound. The first gas product is cooled and condenses into a liquid or solid condensate or source material having an indium-containing compound. The source material is collected in the accumulation zone. Vapor or gas resulting from evaporation of the condensate forms a second gas product, which reacts with a second reactive gas in the growth zone for growth of indium nitride.