Patent classifications
H01L21/02527
Doped Diamond SemiConductor and Method of Manufacture Using Laser Abalation
A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may be added to a graphite based ablative layer positioned below a confinement layer, the ablative layer also being graphite based and positioned above a backing layer, to promote formation of diamond particles having desirable semiconductor properties via the action of a laser beam upon the ablative layer. Dopants may be incorporated into the process to activate the reaction sought to produce a material useful in production of a doped semiconductor or a doped conductor suitable for the purpose of modulating the electrical, thermal or quantum properties of the material produced. As disclosed, the diamond particles formed by either the machine or method of confined pulsed laser deposition disclosed may be arranged as semiconductors, electrical components, thermal components, quantum components and/or integrated circuits.
ASSEMBLING OF MOLECULES ON A 2D MATERIAL AND AN ELECTRONIC DEVICE
The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.
Systems and Methods for Fabricating Single-Crystalline Diamond Membranes
A buffer layer is employed to fabricate diamond membranes and allow reuse of diamond substrates. In this approach, diamond membranes are fabricated on the buffer layer, which in turn is disposed on a diamond substrate that is lattice-matched to the diamond membrane. The weak bonding between the buffer layer and the diamond substrate allows ready release of the fabricated diamond membrane. The released diamond membrane is transferred to another substrate to fabricate diamond devices, while the diamond substrate is reused for another fabrication.
Low temperature graphene growth
Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.
METHODS OF GRAPHENE GROWTH AND RELATED STRUCTURES
A method and structure for providing uniform, large-area graphene by way of a transfer-free, direct-growth process. In some embodiments, a SAM is used as a carbon source for direct graphene synthesis on a substrate. For example, a SAM is formed on an insulating surface, and a metal layer is formed over the SAM. The metal layer may serve as a catalytic metal, whereby the SAM is converted to graphene following an annealing process. The SAM is deposited using a VPD process (e.g., an ALD process and/or an MLD process). In some embodiments, a CNT having a controlled diameter may be formed on the surface of a nanorod by appropriately tuning the geometry of the nanorod. Additionally, in some embodiments, a curved graphene transistor may be formed over a curved oxide surface, thereby providing a band gap in a channel region of the graphene transistor.
DIRECT TRANSFER OF MULTIPLE GRAPHENE LAYERS ONTO MULTIPLE TARGET SUBSTRATES
Disclosed is a method of making a conductive material or active material that includes graphene or other 2-D materials. The method includes obtaining a layered stack. The layered stack including one or more conductive materials or 2-D materials separated by a metal layer, and one or more substrate materials. The stack can be subjected to a metal removal process to obtain two conductive or active materials. A first conductive or active material can include a first substrate layer attached to the first active layer. The second conductive or active material can include a second substrate layer attached to the second active layer. The first and second active layers can be conductive graphene layers.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR WAFER
A method of manufacturing a semiconductor device is provided. The method includes forming a carbon structure on a handle substrate at a first surface of the handle substrate. The method further includes attaching a first surface of a semiconductor substrate to the first surface of the handle substrate. The method further includes processing the semiconductor substrate and performing a separation process to separate the handle substrate from the semiconductor substrate. The separation process comprises modifying the carbon structure.
Method of intercalating insulating layer between metal and graphene layer and method of fabricating semiconductor device using the intercalation method
A method includes growing a graphene layer on a metal layer, intercalating a first material between the metal layer and the graphene layer by heating the first material at a first pressure and a first temperature, and intercalating a second material between the metal layer and the graphene layer by heating the second material at a second pressure different from the first pressure and a second temperature different from the first temperature. Accordingly, the first material and the second material are chemically bonded to each other to form an insulating layer, and the insulating layer may be between the metal layer and the graphene layer.
GaN/diamond wafers
Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a substrate wafer that includes a glass substrate (or a silicon substrate covered by a protection layer) is glass bonded to the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.
COMPOSITE SUBSTRATE MANUFACTURING METHOD AND COMPOSITE SUBSTRATE
To provide a composite substrate whereby a nanocarbon film having no defect can be manufactured at low cost.
A method for manufacturing a composite substrate, including: implanting ion from a surface of a single crystal silicon carbide substrate to form an ion-implanted region; bonding an ion-implanted surface of the single crystal silicon carbide substrate and a main surface of a handle substrate, and peeling the single crystal silicon carbide substrate at the ion-implanted region to transfer single crystal silicon carbide thin film onto the handle substrate, wherein the surface to be bonded of the single crystal silicon carbide substrate and the surface to be bonded of the handle substrate each has a surface roughness RMS of 1.00 nm or less.