A method for fabricating a component according to an example of the present disclosure includes the steps of depositing a stoichiometric precursor layer onto a preform, and densifying the preform by depositing a matrix material onto the stoichiometric precursor layer. An alternate method and a component are also disclosed.

A semiconductor device, including a first semiconductor layer of the first conductivity type formed on a semiconductor substrate, a first semiconductor region of the first conductivity type, a first base region and a first base region, both of a second conductivity type, selectively provided in the first semiconductor layer, a second semiconductor layer of the second conductivity type provided on the first semiconductor layer, a second semiconductor region of the first conductivity type selectively provided in the second semiconductor layer, a trench penetrating the second semiconductor layer and the second semiconductor region, a gate electrode provided in the trench, an interlayer insulating film provided on the gate electrode, a second base region in contact with a bottom of the trench, a first electrode in contact with the second semiconductor layer and the second semiconductor region, and a second electrode provided on the back of the semiconductor substrate.

A SiC epitaxial wafer according to an embodiment includes: a SiC substrate; and a SiC epitaxial layer formed on a first surface of the SiC substrate. The in-plane uniformity of a density of Z.sub.1/2 centers of the SiC epitaxial layer is 5% or less.

The present disclosure provides a semiconductor device structure in accordance with some embodiments. In some embodiments, the semiconductor device structure includes a semiconductor substrate of a first semiconductor material and having first recesses. The semiconductor device structure further includes a first gate stack formed on the semiconductor substrate and being adjacent the first recesses. In some examples, a passivation material layer of a second semiconductor material is formed in the first recesses. In some embodiments, first source and drain (S/D) features of a third semiconductor material are formed in the first recesses and are separated from the semiconductor substrate by the passivation material layer. In some cases, the passivation material layer is free of chlorine.

A buffer layer on a silicon carbide substrate and a method of forming the same are disclosed. The buffer layer includes at least two layers of silicon carbide films, in which at least each lower one is doped at a top surface thereof with predetermined ions. As a result, at the top surface of the silicon carbide film, a barrier with different parameter is formed, which can block dislocation defects that have spread into the silicon carbide film from further upward propagation in the silicon carbide film.

The present disclosure relates to a part including silicon carbide layer and manufacturing method thereof, and the manufacturing method according to the present disclosure includes preparing a graphite substrate, and laminating a silicon carbide layer on a surface of the graphite substrate, wherein at the laminating the silicon carbide layer, the silicon carbide layer is laminated such that the thickness of the silicon carbide layer is 0.01 to 1 times the thickness of the graphite substrate, thereby improving the durability of the part including silicon carbide layer.

The present disclosure provides a radio frequency device, a silicon carbide homoepitaxial substrate and a manufacturing method thereof. The manufacturing method of the silicon carbide homoepitaxial substrate includes: providing an N-type silicon carbide substrate, forming first grooves in the N-type silicon carbide substrate; forming a defect repair layer on inner walls of the first grooves and outside the first grooves, and forming second grooves in the defect repair layer corresponding to the first grooves; forming an unintentionally doped silicon carbide layer on the defect repair layer, where the second grooves are fully filled with the unintentionally doped silicon carbide layer.

A rare earth-containing SiC substrate includes a rare earth element and Al. A concentration of the rare earth element is from 1×10.sup.16 atoms/cm.sup.3 to 1×10.sup.19 atoms/cm.sup.3 inclusive and a concentration of Al is from 1×10.sup.16 atoms/cm.sup.3 to 1×10.sup.21 atoms/cm.sup.3 inclusive.

First and second p-type semiconductor regions (electric-field relaxation layers) are formed by ion implantation using a dummy gate and side wall films on both sides of the dummy gate as a mask. In this manner, it is possible to reduce a distance between the first p-type semiconductor region and a trench and a distance between the second p-type semiconductor region and the trench, and symmetry of the first and second p-type semiconductor regions with respect to the trench can be enhanced. As a result, semiconductor elements can be miniaturized, and on-resistance and an electric-field relaxation effect, which are in a trade-off relationship, can be balanced, so that characteristics of the semiconductor elements can be improved.

A semiconductor device has a substrate. The substrate can be multiple layers. A first semiconductor layer made of a first semiconductor material is disposed over the substrate. The first semiconductor material can be substantially defect-free silicon carbide. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third layer can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.