The present disclosure is directed to semiconductor structures with source/drain epitaxial stacks having a low-melting point top layer and a high-melting point bottom layer. For example, a semiconductor structure includes a gate structure disposed on a fin and a recess formed in a portion of the fin not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, where the source/drain epitaxial stack has bottom layer and a top layer with a higher activated dopant concentration than the bottom layer.

Disclosed are an MPS diode device and a preparation method therefor. The MPS diode device comprises a plurality of cells arranged in parallel, wherein each cell comprises a cathode electrode, and a substrate, epitaxial layer, buffer layer, and anode electrode that are formed in succession on the cathode electrode; two active regions are formed on the side of the epitaxial layer away from the substrate; the width of forbidden band of the buffer layer is greater than the width of forbidden band of the epitaxial layer, and a material of the buffer layer and a material of the epitaxial layer are allotropes; and first openings are formed at the positions in the buffer layer opposite to the active regions, and an ohmic metal layer is formed in the first openings.

According to one embodiment, a wafer includes a base body including a first surface, and a crystal layer provided on the first surface. The crystal layer includes first stacking faults and one or second stacking faults. One of the first stacking faults includes a first long side, a first short side, and a first hypotenuse. A position of the first long side in a first direction from the base body to the crystal layer is between the base body in the first direction and a first corner portion in the first direction. One of the one or the plurality of second stacking faults includes a second long side, a second short side, and a second hypotenuse. A position of a second corner portion in the first direction is between the base body in the first direction and the second long side in the first direction.

A method of forming a silicon carbide-containing film on a substrate in a processing container. The method includes: accommodating the substrate in the processing container; adsorbing an organic compound on the substrate by supplying a carbon precursor gas to the processing container; and reacting the organic compound adsorbed on the substrate with a silicon compound by supplying a silicon precursor gas including the silicon compound to the processing container. The adsorbing the organic compound on the substrate and the reacting the organic compound are alternately repeated multiple times. In the adsorbing the organic compound, the vacuum exhaust is restricted, and then the restriction of the vacuum exhaust is released. The supply of the silicon precursor gas is stopped during the reacting the organic compound with the silicon compound, and the vacuum exhaust is not restricted after the supply of the silicon precursor gas is stopped.

A method of forming a silicon carbide-containing film on a substrate, includes: heating the substrate; supplying a carbon precursor gas containing an organic compound having an unsaturated carbon bond to the heated substrate; supplying a silicon precursor gas containing a silicon compound to the heated substrate; laminating, on the substrate, a silicon carbide-containing layer to be turned into the silicon carbide-containing film by allowing the organic compound having the unsaturated carbon bond to thermally react with the silicon compound; and supplying plasma to the silicon carbide-containing layer.

The present disclosure relates a semiconductor device using a super junction structure, and includes: a semiconductor base body of a first conductivity type; a pillar part including a plurality of first pillars of a first conductivity type and a plurality of second pillars of a second conductivity type provided on the semiconductor base body to protrude in a thickness direction of the semiconductor base body; a pillar surrounding part of a first conductivity type or a second conductivity type provided around the pillar part; and a semiconductor element in which the pillar part is provided as an active region, wherein the plurality of first and second pillars have a striped shape in a plan view, and are alternately arranged in parallel to each other in a pillar width direction perpendicular to a longitudinal direction of each of the pillars.

A vapor phase growth method of embodiments includes: forming a first silicon carbide layer having a first doping concentration on a silicon carbide substrate at a first growth rate by supplying a first process gas under a first gas condition; forming a second silicon carbide layer having a second doping concentration at a second growth rate higher than the first growth rate by supplying a second process gas under a second gas condition; and forming a third silicon carbide layer having a third doping concentration lower than the first doping concentration and the second doping concentration at a third growth rate higher than the second growth rate by supplying a third process gas under a third gas condition.

A method for manufacturing a structured substrate provided with a trap-rich layer whereon rests a stack consisting of an insulating layer and of a layer of single-crystal material, includes forming an amorphous silicon layer on a front face of a silicon substrate and heat treating intended to convert the amorphous silicon layer into a trap-rich layer made of single-crystal silicon grains. The heat treatment conditions in terms of duration and of temperature are adjusted to limit the grains to a size less than 200 nm. The method also includes overlapping the trap-rich layer with an insulating layer and a layer of single-crystal material.

A method for forming layers with silicon is disclosed. The layers may be created by positioning a substrate within a processing chamber, heating the substrate to a first temperature between 300 and 500° C. and introducing a first precursor into the processing chamber to deposit a first layer. The substrate may be heated to a second temperature between 400 and 600° C.; and, a second precursor may be introduced into the processing chamber to deposit a second layer. The first and second precursor may comprise silicon atoms and the first precursor may have more silicon atoms per molecule than the second precursor.

A silicon carbide semiconductor device includes a silicon carbide semiconductor layer and a side silicide layer. The silicon carbide semiconductor layer includes a silicon carbide single crystal and has a main surface, a rear surface opposite to the main surface, and a side surface connecting the main surface and the rear surface and formed by a cleavage plane. The silicon carbide semiconductor layer further includes a modified layer. The modified layer forms a part of the side surface located close to the rear surface and has an atomic arrangement structure of silicon carbide different from an atomic arrangement structure of the silicon carbide single crystal. The side silicide layer includes a metal silicide that is a compound of a metal element and silicon. The side silicide layer is disposed on the side surface of the silicon carbide semiconductor layer and is adjacent to the modified layer.