H01L21/02554

Semiconductor device and method for manufacturing the same

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20220271150 · 2022-08-25 ·

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.

THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

A thin film transistor is used to solve a problem of low process efficiency of the conventional thin film transistor in preventing hydrogen diffusion. The thin film transistor includes a substrate, multilayer thin films laminated on the substrate, and at least one fluorine-containing thin film laminated in substitution for the multilayer thin films. Each of the multilayer thin films is a gate insulating layer, an active layer, a buffer layer, and a dielectric layer or a protective layer. Each of the at least one fluorine-containing thin film is a fluorine-doped insulating layer, a fluorine-doped active layer, a fluorine-doped buffer layer, and a fluorine-doped dielectric layer or a fluorine-doped protective layer. The invention further discloses a method for manufacturing the thin film transistor.

METHODS AND MATERIAL DEPOSITION SYSTEMS FOR FORMING SEMICONDUCTOR LAYERS
20220270876 · 2022-08-25 · ·

Systems and methods for forming semiconductor layers, including oxide-based layers, are disclosed in which a material deposition system has a rotation mechanism that rotates a substrate around a center axis of the substrate. The system includes a heater configured to heat the substrate and a positioning mechanism that allows dynamic adjusting of an orthogonal distance, a lateral distance, and a tilt angle of an exit aperture of a material source relative to the substrate. In some embodiments, the dynamic adjusting is based on a desired layer uniformity for a desired layer growth rate. In some embodiments, the orthogonal distance, the lateral distance, or the tilt angle depends on a predetermined material ejection spatial distribution of the material source.

Semiconductor device and manufacturing method thereof

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

Semiconductor Device and Method For Manufacturing Semiconductor Device

A semiconductor device with high reliability is provided. The semiconductor device includes a first oxide; a first conductor, a second conductor, and a first insulator over the first oxide; and a third conductor over the first insulator. The first conductor includes a first crystal. The second conductor includes a crystal having the same crystal structure as the first crystal. The first crystal has (111) orientation with respect to a surface of the first oxide. The first oxide includes a second crystal. The second crystal has c-axis alignment with respect to a surface where the first oxide is formed. The lattice mismatch degree of the first crystal with respect to the second crystal is lower than or equal to 8 percent.

Semiconductor device and method for manufacturing the same

An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.

METAL OXIDE SEMICONDUCTOR-BASED LIGHT EMITTING DEVICE
20220271197 · 2022-08-25 · ·

In some embodiments, an optoelectronic semiconductor light emitting device includes: a substrate; and a plurality of epitaxial semiconductor layers disposed on the substrate. Each of the epitaxial semiconductor layers can comprise an epitaxial oxide. At least one of the epitaxial semiconductor layers can comprise an optically emissive material of direct bandgap type. At least one of the epitaxial semiconductor layers can comprise (Al.sub.x1Ga.sub.1−x1).sub.2O.sub.3 wherein 0≤x1≤1. The plurality of epitaxial semiconductor layers can comprise: first region comprising a first conductivity type; a second region comprising a not-intentionally doped (NID) intrinsic region; and a third region comprising a second conductivity type. The substrate and the plurality of epitaxial semiconductor layers can be a substantially single crystal epitaxially formed device. The optoelectronic semiconductor light emitting device can be configured to emit light having a wavelength in a range from 150 nm to 425 nm.

Plasmonic graphene and method of making the same
09722110 · 2017-08-01 · ·

Plasmonic graphene is fabricated using thermally assisted self-assembly of plasmonic nanostructure on graphene. Silver nanostructures were deposited on graphene as an example.

Method of forming strain-relaxed buffer layers
09721792 · 2017-08-01 · ·

Implementations described herein generally relate to methods for relaxing strain in thin semiconductor films grown on another semiconductor substrate that has a different lattice constant. Strain relaxation typically involves forming a strain relaxed buffer layer on the semiconductor substrate for further growth of another semiconductor material on top. Whereas conventionally formed buffer layers are often thick, rough and/or defective, the strain relaxed buffer layers formed using the implementations described herein demonstrate improved surface morphology with minimal defects.