Patent classifications
H01L21/02554
Radiation hardened thin-film transistors
A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
INTEGRATED CIRCUIT DIE HAVING REDUCED DEFECT GROUP III-NITRIDE LAYER AND METHODS ASSOCIATED THEREWITH
Embodiments of the present disclosure are directed towards an integrated circuit (IC) die. In embodiments, an IC die may include a semiconductor substrate, a group III-Nitride or II-VI wurtzite layer disposed over the semiconductor substrate, and a plurality of buffer structures at least partially embedded in the group III-Nitride or II-VI wurtzite layer. In some embodiments, each of the plurality of buffer structures may include a central member disposed over the semiconductor substrate, a lower lateral member disposed over the semiconductor substrate and extending laterally away from the central member, and an upper lateral member disposed over the central member and extending laterally from the central member in an opposite direction from the lower lateral member. The plurality of buffer structures may be positioned in a staggered arrangement to terminate defects of the group III-Nitride or II-VI wurtzite layer. Other embodiments may be described and/or claimed.
SPUTTERING TARGET, OXIDE SEMICONDUCTOR, OXYNITRIDE SEMICONDUCTOR, AND TRANSISTOR
A novel oxide semiconductor, a novel oxynitride semiconductor, a transistor including them, or a novel sputtering target is provided. A composite target includes a first region and a second region. The first region includes an insulating material and the second region includes a conductive material. The first region and the second region each include a microcrystal whose diameter is greater than or equal to 0.5 nm and less than or equal to 3 nm or a value in the neighborhood thereof. A semiconductor film is formed using the composite target.
METHOD FOR SELECTIVE THIN FILM DEPOSITION
A method device is prepared with a patterned thin film that can include one or more metal oxides on a suitable substrate. Initially, a pattern of a deposition inhibitor is provided on a surface of the substrate, which deposition inhibitor comprises at least one cellulose ester. This pattern has both inhibitor areas where the deposition inhibitor is present and open areas where the deposition inhibitor is absent. An inorganic thin film is then deposited on the surface of the substrate by a chemical vapor deposition process only in the open areas of the pattern. Further operations can be carried out including deposit of a second inorganic thin film exactly over the initial inorganic thin film, the deposition inhibitor can be removed from the inhibitor areas of the pattern, or both operations can be carried out in sequence.
Semiconductor device having an oxide semiconductor layer
A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.
Oxide semiconductor target, oxide semiconductor film and method for producing same, and thin film transistor
The invention provides an oxide semiconductor target including an oxide sintered body including zinc, tin, oxygen, and aluminum in a content ratio of from 0.005% by mass to 0.2% by mass with respect to the total mass of the oxide sintered body, in which the content ratio of silicon to the total mass of the oxide sintered body is less than 0.03% by mass.
Semiconductor device comprising oxide conductor and display device including the semiconductor device
The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.
Oxide semiconductor thin-film and thin-film transistor consisted thereof
The present application discloses an oxide semiconductor thin-film and a thin-film transistor consisted thereof. The oxide semiconductor thin-film is fabricated by doping a certain amount of rare-earth oxide (RO) as light stabilizer to metal oxide (MO) semiconductor. The thin-film transistor comprising a gate electrode, a channel layer consisted by the oxide semiconductor thin-film, a source and drain electrode; the thin-film transistor employing etch-stop structure, a back-channel etch structure or a top-gate self-alignment structure.
Fabrication of M-plane Gallium Nitride
The present disclosure provides a fabrication of M-plane gallium nitride which is able to grow M-plane gallium nitride without the need of expensive substrates, such as LiAlO.sub.2, LiGaO.sub.2 or SiC. The fabrication of M-plane gallium nitride includes preparing a zinc oxide hexagonal prism having a growth face, and growing a gallium nitride layer on the growth face of the zinc oxide hexagonal prism. The growth face is an M-plane perpendicular to a direction of gravity.
Metal oxide film and method for forming metal oxide film
A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nmφ and less than or equal to 10 nmφ.