A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.

A manufacturing method of a group III-V compound semiconductor device, the method includes: a first process in which a group V material gas and an impurity material gas are supplied to a reacting furnace which is set at a first temperature of a range from 400 C. to 500 C. and a first pressure of a range from 100 hPa to 700 hPa, and impurities are doped in an undoped group III-V compound semiconductor layer, and a second process in which the supply of the impurity material gas is stopped, a temperature of the reacting furnace is raised to a second temperature which is higher than the first temperature, a pressure of the reacting furnace is set lower than a pressure of the first pressure, a supply of an etching gas is initiated and the supply of the group V material gas is continued.

A semiconductor device includes an oxide semiconductor film having a corundum structure or containing as a major component gallium oxide or a mixed crystal of gallium oxide, and the semiconductor device is a normally-off semiconductor device with a threshold voltage that is 3V or more.

A semiconductor element includes a high-resistivity substrate that includes a -Ga.sub.2O.sub.3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a -Ga.sub.2O.sub.3-based single crystal, and a channel layer on the buffer layer, the channel layer including a -Ga.sub.2O.sub.3-based single crystal including a donor impurity. A crystalline laminate structure includes a high-resistivity substrate that includes a -Ga.sub.2O.sub.3-based single crystal including an acceptor impurity, a buffer layer on the high-resistivity substrate, the buffer layer including a -Ga.sub.2O.sub.3-based single crystal, and a donor impurity-containing layer on the buffer layer, the donor impurity-containing layer including a -Ga.sub.2O.sub.3-based single crystal including a donor impurity.

A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.

Provided are a metal chalcogenide thin film and a method and device for manufacturing the same. The metal chalcogenide thin film includes a transition metal element and a chalcogen element, and at least one of the transition metal element and the chalcogen element having a composition gradient along the surface of the metal chalcogenide thin film, the composition gradient being an in-plane composition gradient. The metal chalcogenide thin film may be prepared by using a manufacturing method including providing a transition metal precursor and a chalcogen precursor on a substrate by using a confined reaction space in such a manner that at least one of the transition metal precursor and the chalcogen precursor forms a concentration gradient according to a position on the surface of the substrate; and heat-treating the substrate.

A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.

A doped diamond semiconductor and method of production using a laser is disclosed herein. As disclosed, a dopant and/or a diamond or sapphire seed material may be added to a graphite based ablative layer positioned below a confinement layer, the ablative layer also being graphite based and positioned above a backing layer, to promote formation of diamond particles having desirable semiconductor properties via the action of a laser beam upon the ablative layer. Dopants may be incorporated into the process to activate the reaction sought to produce a material useful in production of a doped semiconductor or a doped conductor suitable for the purpose of modulating the electrical, thermal or quantum properties of the material produced. As disclosed, the diamond particles formed by either the machine or method of confined pulsed laser deposition disclosed may be arranged as semiconductors, electrical components, thermal components, quantum components and/or integrated circuits.

A sputtering equipment configured to grow a gallium oxide film on a substrate is proposed, and the sputtering equipment may include: a chamber; a stage located in the chamber and configured to secure the substrate thereon; a gallium target located in the chamber and including gallium elements; a first power supply configured to apply voltage to the gallium target; and an oxygen element supplier configured to supply oxygen elements into the chamber.

A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.