A method of manufacturing a memory structure including the following steps is provided. A spacer layer is formed on sidewalls of gate stack structures. A protective material layer covering the spacer layer and the gate stack structures is formed. A mask material layer is formed on the protective material layer. There is a void located in the mask material layer between two adjacent gate stack structures. A first distance is between a top of the protective material layer and a top of the mask material layer. A second distance is between a top of the void and a top of the mask material layer above the void. A third distance is between a bottom of the void and a bottom of the mask material layer below the void. The first distance is greater than a sum of the second and third distances.

A laser crystallizing apparatus includes a first light source unit configured to emit a first input light having a linearly polarized laser beam shape. A second light source unit is configured to emit a second input light having a linearly polarized laser beam shape. A polarization optical system is configured to rotate the first input light and/or the second input light at a predetermined rotation angle. An optical system is configured to convert the first input light and the second input light, which pass through the polarization optical system, into an output light. A target substrate is seated on a stage and output light is directed onto the target substrate. A monitoring unit is configured to receive the first input light or the second input light from the polarization optical system and measure a laser beam quality thereof.

A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.

A film forming method includes: forming a laminated film, in which an interface layer, a bulk layer, and a surface layer are laminated in this order, on a base; and crystallizing the laminated film, wherein the bulk layer is formed of a film that is easier to crystallize than the interface layer in crystallizing the laminated film, and wherein the surface layer is formed of a film that is easier to crystallize than the bulk layer in crystallizing the laminated film.

A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.

A method and apparatus for reducing as-deposited and metastable defects relative to amorphous silicon (a-Si) thin films, its alloys and devices fabricated therefrom that include heating an earth shield positioned around a cathode in a parallel plate plasma chemical vapor deposition chamber to control a temperature of a showerhead in the deposition chamber in the range of 350° C. to 600° C. An anode in the deposition chamber is cooled to maintain a temperature in the range of 50° C. to 450° C. at the substrate that is positioned at the anode. In the apparatus, a heater is embedded within the earth shield and a cooling system is embedded within the anode.

A method for selectively depositing an amorphous silicon film on a substrate comprising a metallic nitride surface and a metallic oxide surface is disclosed. The method may include; providing a substrate within a reaction chamber, heating the substrate to a deposition temperature, contacting the substrate with silicon iodide precursor, and selectively depositing the amorphous silicon film on the metallic nitride surface relative to the metallic oxide surface. Semiconductor device structures including an amorphous silicon film deposited by selective deposition methods are also disclosed.

There is included (a) forming a chlorine-containing semiconductor layer on an insulating film provided on a surface of a substrate by supplying a first gas containing a semiconductor element and chlorine to the substrate; and (b) forming a semiconductor film on the chlorine-containing semiconductor layer by supplying a second gas containing a semiconductor element to the substrate, wherein a chlorine concentration in the chlorine-containing semiconductor layer formed in (a) is made 1.0×10.sup.20 atoms/cm.sup.3 or more and 1.0× 10.sup.22 atoms/cm.sup.3 or less.

A method of forming high quality a-BN layers. The method includes use of a precursor chemistry that is particularly suited for use in a cyclical deposition process such as in chemical vapor deposition (CVD), atomic layer deposition (ALD), and the like. In brief, new methods are described of forming boron nitride (BN) layers from precursors capable of growing amorphous BN (a-BN) films by CVD, ALD, or the like. In some cases, the precursor is or includes a borane adduct of hydrazine or a hydrazine derivative.

Described herein are integrated circuit devices with lined interconnects. Interconnect liners can help maintain conductivity between semiconductor devices (e.g., transistors) and the interconnects that conduct current to and from the semiconductor devices. In some embodiments, metal interconnects are lined with a tungsten liner. Tungsten liners may be particularly useful with semiconductor devices that use certain channel materials, such as indium gallium zinc oxide.