A MOS capacitor, a method of fabricating the same, and a semiconductor device using the same are provided. The MOS capacitor is arranged in an outermost cell block of the semiconductor device employing an open bit line structure. The MOS capacitor includes a first electrode arranged in a semiconductor substrate, a dielectric layer arranged on a semiconductor substrate, and a second electrode arranged on the dielectric layer and including a dummy bit line.

To provide a crystalline oxide semiconductor film. By collision of ions with a target including a crystalline In—Ga—Zn oxide, a flat-plate-like In—Ga—Zn oxide is separated. In the flat-plate-like In—Ga—Zn oxide, a first layer including a gallium atom, a zinc atom, and an oxygen atom, a second layer including a zinc atom and an oxygen atom, a third layer including an indium atom and an oxygen atom, and a fourth layer including a gallium atom, a zinc atom, and an oxygen atom are stacked in this order. After the flat-plate-like In—Ga—Zn oxide is deposited over a substrate while maintaining the crystallinity, the second layer is gasified and exhausted.

A method of making a silicon carbide MOSFET device can include: providing a substrate with a first doping type; forming a patterned first barrier layer on a first surface of the substrate; forming a source region with a first doping type in the substrate; forming a base region with a second doping type and a contact region with a second doping type in the substrate, and forming a gate structure. The first barrier layer can include a first portion and a second portion, the first portion can include a semiconductor layer and a removable layer different from the semiconductor layer, and the second portion can only include the removable layer.

A display device, and method for manufacture, having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. A material of the first active layer is different than a material of the second active layer, and a hydrogen concentration of the second gate insulator is different from a hydrogen concentration of the first gate insulator.

Provided are nanocrystalline graphene and a method of forming the nanocrystalline graphene through a plasma enhanced chemical vapor deposition process. The nanocrystalline graphene may have a ratio of carbon having an sp.sup.2 bonding structure to total carbon within the range of about 50% to 99%. In addition, the nanocrystalline graphene may include crystals having a size of about 0.5 nm to about 100 nm.

A plasma processing device, a plasma processing method and a manufacturing method of an electronic device with excellent uniformity, are capable of performing heating and high-speed processing for a short period of time as well as controlling the distribution of heating performances in a linear direction (amounts of heat influx to a substrate). In an inductively-coupled plasma torch unit, coils, a first ceramic block and a second ceramic block are arranged, and a chamber has an annular shape. A plasma P is applied to a substrate at an opening of the chamber. The chamber and the substrate are relatively moved in a direction perpendicular to a longitudinal direction of the opening. Plural gas jetting ports jetting a gas toward a substrate stage are provided side by side in a direction of a line formed by the opening, thereby controlling the distribution of heating performances in the linear direction and realizing plasma processing with excellent uniformity.

Disclosed is a plasma processing method including: growing a polycrystalline silicon layer on a processing target base body; and exposing the polycrystalline silicon layer to hydrogen radicals by supplying a processing gas containing hydrogen into a processing container that accommodates the processing target base body including the polycrystalline silicon layer grown thereon and radiating microwaves within the processing container to generate the hydrogen radicals.

A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film; a second step of forming a pillar-shaped semiconductor layer and a first dummy gate; a third step of forming a second dummy gate; a fourth step of forming a fifth insulating film and a sixth insulating film; a fifth step of depositing a first interlayer insulating film, removing the second dummy gate and the first dummy gate, forming a gate insulating film, depositing metal, and performing etch back to form a gate electrode and a gate line; a seventh step of forming a seventh insulating film; and an eighth step of forming insulating film sidewalls, forming a first epitaxially grown layer on the fin-shaped semiconductor layer, and forming a second epitaxially grown layer on the pillar-shaped semiconductor layer.

A semiconductor die with backside protection includes an active region and a first polysilicon layer formed on a front side of a semiconductor substrate. A signal net is connected to the first polysilicon layer by way of a metal contact and a conductive wire is formed above the active region. During an invasive attack, when a trench is formed in the substrate and an electrically conductive filling is deposited in the trench, the signal net, the conductive wire, and the first polysilicon shape form a short-circuit, which renders the die dysfunctional and thereby foiling the invasive attack.

A film forming apparatus includes: a processing chamber receiving a substrate and performing a film forming process for forming a predetermined film; a gas supply means supplying inert gas; an exhaust means exhausting an inside of the processing chamber to adjust a pressure in the processing chamber; an impurity concentration detecting means detecting impurity concentration in the processing chamber; and a controller performing a purge process which includes supplying the inert gas into the processing chamber without exhausting the inside of the processing chamber and exhausting the inside of the processing chamber without supplying the inert gas into the processing chamber when the impurity concentration detected by the impurity concentration detecting means is equal to or more than a predetermined value, and perform the film forming process with respect to the substrate when the impurity concentration detected by the impurity concentration detecting means is less than the predetermined value.