Passivated semiconductor nanoparticles and methods for the fabrication and use of passivated semiconductor nanoparticles is provided herein.

Disclosed are an MPS diode device and a preparation method therefor. The MPS diode device comprises a plurality of cells arranged in parallel, wherein each cell comprises a cathode electrode, and a substrate, epitaxial layer, buffer layer, and anode electrode that are formed in succession on the cathode electrode; two active regions are formed on the side of the epitaxial layer away from the substrate; the width of forbidden band of the buffer layer is greater than the width of forbidden band of the epitaxial layer, and a material of the buffer layer and a material of the epitaxial layer are allotropes; and first openings are formed at the positions in the buffer layer opposite to the active regions, and an ohmic metal layer is formed in the first openings.

A process for preparing stacks of metal chalcogenide flakes includes: (a) reacting together a source of the metal atom of the target metal chalcogenide with a source of the chalcogenide atom of the target metal chalcogenide, in the presence of a spacer, so as to produce flakes of the metal chalcogenide; (b) depositing metal chalcogenide flakes obtained using step (a) onto a substrate to form a stack of assembled metal chalcogenide flakes, wherein the spacer contains an alkyl chain linked to a functional group able to bond to the metal chalcogenide surface, said alkyl chain having a length of less than 18 carbon atoms, preferably between 6 and 14 carbon atoms.

A semiconductor nanocrystal particle including a transition metal chalcogenide represented by Chemical Formula 1, the semiconductor nanocrystal particle having a size of less than or equal to about 100 nanometers, and a method of producing the same:
M.sup.1M.sup.2Cha.sub.3  Chemical Formula 1 wherein M.sup.1 is Ca, Sr, Ba, or a combination thereof, M.sup.2 is Ti, Zr, Hf, or a combination thereof, and Cha is S, Se, Te, or a combination thereof.

The invention relates to methods for preparing 3-element semiconductor nanocrystals of the formula WYxZ(1-x), wherein W is a Group II element, Y and Z are different Group VI elements, and 0<X<1, comprising dissolving a Group II element, a first Group VI element, and a second Group VI element in a one or more solvents. The Group II, VI and VI elements are combined to provide a II:VI:VI SCN precursor solution, which is heated to a temperature sufficient to produce semiconductor nanocrystals of the formula WYxZ(1-x). The solvent used to dissolve the Group II element comprises octadecene and a fatty acid. The solvent used to dissolve the Group VI elements comprises octadecene. The invention also includes semiconductor nanocrystals prepared according to the disclosed methods, as well as methods of using the semiconductor nanocrystals.

Quantum dots and methods of making quantum dots are provided.

The invention relates to a method for manufacture of an electrical contact on a structure (10) made of an anisotropic material NA which exhibits an anisotropic electrical conductivity, where the structure (10) exhibits an axial electrical conductivity along a first axis XX′ of the structure (10) and an orthogonal conductivity along a direction YY′ orthogonal to the first axis XX′ of the structure (10), where the orthogonal conductivity is less than the axial conductivity, where the method comprises: a step for the formation of a conductive electrode (20), with an initial thickness Ei, comprising a species M, on a first surface (30) of the structure (10), where the first surface (30) is orthogonal to the orthogonal direction YY′; the method being characterized in that the step for the formation of the conductive electrode (20) is followed by a step for implantation of species X through the conductive electrode (20), into the structure (10).

A method of forming a nanosheet transistor device is provided. The method includes forming a segment stack of alternating intermediate sacrificial segments and nanosheet segments on a bottom sacrificial segment, wherein the segment stack is on a mesa and a nanosheet template in on the segment stack. The method further includes removing the bottom sacrificial layer to form a conduit, and forming a fill layer in the conduit and encapsulating at least a portion of the segment stack.

A method that includes: providing a substrate including a layer of a crystalline material having a first surface; and exposing the first surface to an environment under conditions sufficient to cause epitaxial growth of a layer of a deposition material on the first surface, wherein exposing the first surface to the environment includes illuminating the substrate with light at a first wavelength while causing the epitaxial growth of the layer of the deposition material. The first surface includes one or more discrete growth sites at which an epitaxial growth rate of the quantum confined nanostructure material is larger than areas of the first surface away from the growth sites by an amount sufficient so that the deposition material forms a quantum confined nanostructure at each of the one or more discrete growth sites.

To provide a novel method for manufacturing a semiconductor device. To provide a method for manufacturing a highly reliable semiconductor device at relatively low temperature. The method includes a first step of forming a first oxide semiconductor film in a deposition chamber and a second step of forming a second oxide semiconductor film over the first oxide semiconductor film in the deposition chamber. Water vapor partial pressure in an atmosphere in the deposition chamber is lower than water vapor partial pressure in atmospheric air. The first oxide semiconductor film and the second oxide semiconductor film are formed such that the first oxide semiconductor film and the second oxide semiconductor film each have crystallinity. The second oxide semiconductor film is formed such that the crystallinity of the second oxide semiconductor film is higher than the crystallinity of the first oxide semiconductor film.