A display panel includes: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active layer includes: a core layer in which a concentration of the boron is greater than a concentration of the fluorine; and a surface layer on the core layer and in which a concentration of the fluorine is greater than a concentration of the boron.

A manufacturing method and apparatus of low temperature polycrystalline silicon, and a polycrystalline silicon are provided. The manufacturing method of low temperature polycrystalline silicon includes forming an amorphous silicon layer on a substrate; scanning the amorphous silicon layer by using a laser to emit a strip-shaped laser beam to go through a mask which includes transmissive stripes and partially-transmissive stripes arranged alternately, to form low temperature fusion regions and high temperature fusion regions which are arranged alternately on the amorphous silicon layer; recrystallizing the amorphous silicon layer from the low temperature fusion regions to the high temperature fusion regions.

Provided is a method of manufacturing a semiconductor device. The method of manufacturing a semiconductor device includes forming a target etching layer on a substrate, patterning the target etching layer to form a pattern layer including a pattern portion having a first height and a first width and a recess portion having a second width, providing a first gas and a second gas on the pattern layer, and performing a reaction process including reacting the first and second gases with a surface of the pattern portion by irradiating a laser beam on the pattern layer. The performing the reaction process includes removing a portion of sidewalls of the pattern portion so that the pattern portion has a third width that is smaller than the first width.

A laser crystallization device includes a laser oscillator, a stage, and a reflection unit. The stage is configured to support a substrate with a target film disposed on the substrate. The laser oscillator is configured to irradiate an incident laser beam on the target film. The stage is configured to move the substrate such that the incident laser beam scans the target film. The incident laser beam is reflected from the target film to generate a reflected laser beam. The reflection unit includes at least two reflection mirrors positioned at a path of the reflected laser beam. The reflection unit is configured to re-irradiate the reflected laser beam on the target film two or more times through a plurality of paths that are different from a path of the incident laser beam.

A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the array substrate includes depositing an amorphous silicon thin film layer on a base substrate; performing a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer. With this method, when a laser annealing treatment of amorphous silicon is performed, the molten silicon after melting fills the space of small pores at a surface of the amorphous silicon thin film layer firstly, thereby avoiding forming a protruded grain boundary that is produced because the excess volume of polysilicon is squeezed.

An impurity of a second conductivity type is selectively doped in a surface of a semiconductor substrate of a first conductivity type to form doped regions. A portion of a surface of the doped regions is covered by a heat insulating film. At least a remaining portion of the surface of the doped regions is covered by an absorbing film and the doped regions are heated through the absorbing film, enabling an impurity region of the second conductivity type to be formed having two or more of the doped regions that have a same impurity concentration and differing carrier concentrations.

Manufacture of a transistor device with at least one P type transistor with channel structure strained in uniaxial compression strain starting from a silicon layer strained in biaxial tension, by amorphisation recrystallisation then germanium condensation.

The present disclosure provides a TFT, its manufacturing method, an array substrate and a display device. The method includes steps of: forming a pattern of a gate electrode on a base substrate; forming a gate insulation layer with an even surface; forming a pattern of a polysilicon semiconductor layer; and forming patterns of a source electrode and a drain electrode. The step of forming the pattern of the polysilicon semiconductor layer includes: crystallizing the amorphous silicon layer, so as to form the polysilicon semiconductor layer.

A display device may include a thin film transistor disposed on a substrate, and a display element electrically connected to the thin film transistor. The thin film transistor may include an active pattern including polycrystalline silicon, a gate insulation layer disposed on the active pattern, and a gate electrode disposed on the gate insulation layer. An average value of grain sizes of the active pattern may be in a range of about 400 nm to about 800 nm. An RMS value of a surface roughness of the active pattern may be about 4 nm or less. A method of manufacturing a polycrystalline silicon layer may include cleaning an amorphous silicon layer with hydrofluoric acid, rinsing the amorphous silicon layer with hydrogenated deionized water, and irradiating the amorphous silicon layer with a laser beam having an energy density of about 440 mJ/cm.sup.2 to about 490 mJ/cm.sup.2.

A method of fabricating at least one single-crystal alloy semiconductor structure. At least one seed, containing an alloying material, on a substrate for growth of at least one single-crystal alloy semiconductor structure is formed. At least one structural form, formed of a host material, on the substrate is crystallized to form the at least one single-crystal alloy semiconductor structure. The at least one structural form is heated such that the material of the at least one structural form has a liquid state. Also, the at least one structural form is cooled, such that the material of the at least one structural form nucleates at the least one seed and crystallizes as a single crystal to provide at least one single-crystal alloy semiconductor structure, with a growth front of the single crystal propagating in a main body of the respective structural form away from the respective seed.