Structures with trench isolation and methods for making a structure with trench isolation. A transistor is formed by front-end-of-line processing on a first surface of a semiconductor substrate. A barrier layer is formed by middle-of-line processing on the transistor and the first surface of the semiconductor substrate. After the transistor and the barrier layer are formed, a trench is etched into the semiconductor substrate from a second surface of the semiconductor substrate that is opposite from the first surface of the semiconductor substrate. The trench, which is used to form an isolation region, may terminate on a dielectric layer associated with the transistor or may terminate on the barrier layer.

The present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor on an insulator (SOI) substrate having a bottom substrate, a buried oxide layer on the bottom substrate, and a semiconductor layer on the buried oxide layer. The semiconductor device also includes a first dielectric layer disposed on the semiconductor layer, a first contact structure extending from a top surface of the first dielectric layer through the semiconductor layer and the buried oxide layer and contacting the bottom substrate, and a first trench extending into the semiconductor layer. A width of the first trench is smaller than a width of the first contact structure. The first dielectric layer seals the first trench at or near the top of the first trench to form a vacuum gap.

A semiconductor device and a method of fabricating the same are provide. The fabricating method includes providing a silicon-on-insulator (SOI) substrate that includes, from bottom to top, a substrate, a first insulating layer and a semiconductor layer. The semiconductor layer is patterned to form a plurality of dummy patterns. A second insulating layer is formed around the plurality of dummy patterns. The plurality of dummy patterns are removed to form a plurality of openings. A dielectric structure is formed on the substrate and fills into the plurality of openings.

An integrated circuit may be formed by forming a buried isolation layer in an isolation recess in a single-crystal silicon-based substrate. Exposed lateral surfaces of the substrate at the buried isolation layer are covered with a dielectric sidewall. A seed trench is formed through the buried isolation layer to expose the substrate. A single-crystal silicon-based seed layer is formed through the seed trench, extending above the top surface of the buried isolation layer. A silicon-based non-crystalline layer is formed contacting the seed layer. A cap layer is formed over the non-crystalline layer. A radiant-induced recrystallization process converts the non-crystalline layer to a single-crystal layer aligned with the seed layer. The cap layer is removed and the single-crystal layer is planarized, leaving an isolated semiconductor layer over the buried isolation layer.

A semiconductor device may include a Silicon on Insulator (SOI) substrate, and a diode formed on the SOI substrate, the diode including a cathode region and an anode region. The semiconductor device may include at least one breakdown voltage trench disposed at an edge of the cathode region, and between the cathode region and the anode region.

A semiconductor device includes: an active layer that is located in an SOI substrate, and in which an element included in a circuit is formed; a buried insulation layer that is located in the SOI substrate, and is in contact with the active layer; a deep trench isolation (DTI) region that is formed in the active layer to surround a whole formation region of the element in plan view, and extends from an upper surface to a lower surface of the active layer; and a first conductive film formed above the element. The DTI region has a first hole inside, and a film thickness of the first conductive film is greater than a thickness of the active layer.

The present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor on an insulator (SOI) substrate having a bottom substrate, a buried oxide layer on the bottom substrate, and a semiconductor layer on the buried oxide layer. The semiconductor device also includes a first dielectric layer disposed on the semiconductor layer, a first contact structure extending from a top surface of the first dielectric layer through the semiconductor layer and the buried oxide layer and contacting the bottom substrate, and a first trench extending into the semiconductor layer. A width of the first trench is smaller than a width of the first contact structure. The first dielectric layer seals the first trench at or near the top of the first trench to form a vacuum gap.

The present disclosure relates to an air-cavity module having a thinned semiconductor die and a mold compound. The thinned semiconductor die includes a back-end-of-line (BEOL) layer, an epitaxial layer over the BEOL layer, and a buried oxide (BOX) layer with discrete holes over the epitaxial layer. The epitaxial layer includes an air-cavity, a first device section, and a second device section. Herein, the air-cavity is in between the first device section and the second device section and directly in connection with each discrete hole in the BOX layer. The mold compound resides directly over at least a portion of the BOX layer, within which the discrete holes are located. The mold compound does not enter into the air-cavity through the discrete holes.

An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.

A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.