A semiconductor circuit includes: a first inductor part configured to connect in series with a source electrode of a first semiconductor element; and a second inductor part configured to connect in series with a source electrode in a second semiconductor element that is configured to connect in parallel with the first semiconductor element; the first inductor part and the second inductor part are arranged to generate an induced electromotive force in the first inductor part and the second inductor part by way of a magnetic interaction so that the currents flowing in the first inductor part and the second inductor part are reinforced in the same direction.

Various embodiments may provide non-isolated single-input dual-output (SIDO) bi-directional buck-boost direct current (DC) to DC (DC-DC) converters. Various embodiments may provide a method for controlling a buck duty cycle of the non-isolated SIDO bi-directional buck-boost DC-DC converter such that a first voltage measured across a first portion of the non-isolated SIDO bi-directional buck-boost DC-DC converter is maintained at less than a voltage of a first load and a second voltage measured across a second portion of the non-isolated SIDO bi-directional buck-boost DC-DC converter is maintained at less than a voltage of a second load.

A circuit includes a high-side transistor pair and a low-side transistor pair having a common intermediate node. The high-side transistor pair includes a first transistor having a control node and a current flowpath therethrough configured to provide a current flow line between a supply voltage node and the intermediate node, and a second transistor having a current flowpath therethrough coupled to the control node of the first transistor. The low-side transistor pair includes a third transistor having a control node and a current flowpath therethrough configured to provide a current flow line between the intermediate node and the reference voltage node, and a fourth transistor having a current flowpath therethrough coupled to the control node of the third transistor. Testing circuitry is configured to be coupled to at least one of the second transistor and the fourth transistor to apply thereto a test-mode signal.

A circuit includes a high-side transistor pair and a low-side transistor pair having a common intermediate node. The high-side transistor pair includes a first transistor having a control node and a current flowpath therethrough configured to provide a current flow line between a supply voltage node and the intermediate node, and a second transistor having a current flowpath therethrough coupled to the control node of the first transistor. The low-side transistor pair includes a third transistor having a control node and a current flowpath therethrough configured to provide a current flow line between the intermediate node and the reference voltage node, and a fourth transistor having a current flowpath therethrough coupled to the control node of the third transistor. Testing circuitry is configured to be coupled to at least one of the second transistor and the fourth transistor to apply thereto a test-mode signal.

A device to convert a detected voltage, that is indicative of current conducted by a switching circuit, to a series of electrical pulses that is indicative of electrical power dissipated by the switching circuit responsive to the current. The device includes a transconductor circuit including a first circuit to receive a reference current and a first reference voltage, and to obtain a transconductance based on an auto-generated bias current and the reference current and the first reference voltage, where a value of the transconductance is determined by the reference current and the first reference voltage. The transconductor circuit further includes a second circuit coupled to the first circuit to receive the detected voltage, and to generate a first current based on the detected voltage and the obtained transconductance.

A device to convert a detected voltage, that is indicative of current conducted by a switching circuit, to a series of electrical pulses that is indicative of electrical power dissipated by the switching circuit responsive to the current. The device includes a transconductor circuit including a first circuit to receive a reference current and a first reference voltage, and to obtain a transconductance based on an auto-generated bias current and the reference current and the first reference voltage, where a value of the transconductance is determined by the reference current and the first reference voltage. The transconductor circuit further includes a second circuit coupled to the first circuit to receive the detected voltage, and to generate a first current based on the detected voltage and the obtained transconductance.

A power converter and a corresponding method of converting power are presented. The power converter includes a ground port, an input port for receiving an input voltage and an output port for providing an output voltage; an inductor; a flying capacitor; a network of switches; and a driver to drive the network of switches with a sequence of states during a drive period. The sequence of states includes a first state and a second state. In the first state one of the input port and the output port is coupled to the ground port via a first path comprising the inductor. In the second state the remaining state among the input port and the output port is coupled to the ground port via a second path and a third path, the second path comprising the flying capacitor and bypassing the inductor, and the third path comprising the inductor.

A buck-boost power converter is operable in a first mode (step-down) or in a second mode (step-up). The power converter has an inductor, a flying capacitor, a network of six switches and a driver adapted to drive the network of switches with a sequence of states. Depending on the mode of operation the sequence of states comprises at least one of a first state and a second state. In the first state the ground port is coupled to the second port via two paths, a first path comprising the flying capacitor and the inductor, and a second path comprising the flying capacitor while bypassing the inductor. In the second state the first port is coupled to the second port via a path that includes the inductor and the ground port is coupled to the first port via a path that includes the flying capacitor while bypassing the inductor.

A buck-boost power converter is operable in a first mode (step-down) or in a second mode (step-up). The power converter has an inductor, a flying capacitor, a network of six switches and a driver adapted to drive the network of switches with a sequence of states. Depending on the mode of operation the sequence of states comprises at least one of a first state and a second state. In the first state the ground port is coupled to the second port via two paths, a first path comprising the flying capacitor and the inductor, and a second path comprising the flying capacitor while bypassing the inductor. In the second state the first port is coupled to the second port via a path that includes the inductor and the ground port is coupled to the first port via a path that includes the flying capacitor while bypassing the inductor.

A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.