A rectifying circuit including: between a first terminal of application of an AC voltage and a first rectified voltage delivery terminal, at least one first diode; and between a second terminal of application of the AC voltage and a second rectified voltage delivery terminal, at least one first anode-gate thyristor, the anode of the first thyristor being connected to the second rectified voltage delivery terminal; and at least one first stage for controlling the first thyristor, including: a first transistor coupling the thyristor gate to a terminal of delivery of a potential which is negative with respect to the potential of the second rectified voltage delivery terminal; and a second transistor connecting a control terminal of the first transistor to a terminal for delivering a potential which is positive with respect to the potential of the second rectified voltage delivery terminal, the anode of the first thyristor being connected to the common potential of voltages defined by said positive and negative potentials.

In a device for operating a rectifier, in particular a semi-controlled rectifier bridge, and a method for operating a rectifier, in particular a power converter, the rectifier is supplied from system phases, in particular from a three-phase AC voltage system, and supplies a unipolar voltage on the output side, the rectifier including controllable switches, in particular semiconductor switches such as thyristors, etc., a respective system phase supplying a respective current source, the current generated in each case being used as trigger signal for the controllable switch allocated to the respective system phase as a function of the state of a controllable switch unit.

A computer-implemented method for controlling a ramp-up of a voltage in a DC-link, a computer-readable storage medium, a variable speed drive, and a system including a variable speed drive configured to carry out the method.

The present description concerns a circuit for converting from a first alternating voltage to a second voltage. The circuit includes: a first thyristor; a first control circuit of the first thyristor; a power factor correction circuit comprising a coil; and a first circuit configured to convert a third voltage into a fourth DC voltage. The third voltage corresponds to a difference between a potential at a first node connected to an output node of the coil and a reference potential. The fourth DC voltage is configured to supply the first control circuit of the first thyristor, and is referenced with respect to the same reference potential as the third voltage.

A bidirectional PFC system includes a high-frequency branch with a first transistor connected between an IO node and a high-frequency tap, and a second transistor connected between the high-frequency tap and a reference node, and a low-frequency branch with a first thyristor connected between the IO node and a low-frequency tap, and a second thyristor connected between the low-frequency tap and the reference node. An inductor is connected between the first node and the high-frequency tap. A first capacitor is connected between the first node and the low-frequency tap. The first node and the low-frequency tap are coupled to input terminals. A control circuit generates first and second gate drive signals for the transistors so as to modify an AC signal at the input terminals such that the AC current falls below a holding current of the second thyristor prior to zero crossing of the AC voltage.

The present description concerns a device for controlling the precharge of a bulk capacitor and for detecting faults in a DC current circuit which comprises the bulk capacitor, at least one DC voltage source, and at least a first precharge switch coupled to an electrode of the bulk capacitor The device comprises at least a pulse transformer provided with a primary and with at least a first and a second secondaries and a circuit for controlling the precharge of the bulk capacitor, coupled to the primary of the pulse transformer. The first secondary of the pulse transformer comprises a first terminal configured to be coupled to a control input of the first precharge switch. The second secondary of the pulse transformer is configured to be coupled in parallel with the bulk capacitor.

A power conversion apparatus includes: a first stage on which a first module is mounted, a second stage stacked on the first stage and on which a second module is mounted, and a coolant circulation circuit allowing a coolant to circulate through the first and second modules. The coolant circulation circuit includes a first cooling pipe disposed on the first stage, a second cooling pipe disposed on the second stage, a first connecting member provided at an opening end of the first cooling pipe, a second connecting member provided at an opening end of the second cooling pipe, a connecting pipe connecting the first connecting member and the second connecting member, a first coupler that couples a first end portion of the connecting pipe to the first connecting member, and a second coupler that couples a second end portion of the connecting pipe to the second connecting member.

A power-factor correction system, includes a high-frequency branch with a first-transistor connected between an IO-node and high-frequency tap, and a second-transistor connected between the high-frequency tap and reference-node, and a low-frequency branch with a first-thyristor connected between the IO-node and low-frequency tap, and a second-thyristor connected between the low-frequency tap and reference-node. An inductor is connected between a first-node and the high-frequency tap. A first capacitor is connected between the first-node and the low-frequency tap. The first-node and the low-frequency tap are coupled to input-terminals. A control circuit generates first and second gate-drive signals for the first and second transistors to accelerate a decrease of an AC current waveform at the input-terminals after a peak of a half-cycle of the AC current waveform so the AC current waveform falls below a holding current of the second thyristor prior to a zero crossing of an AC voltage waveform at the input-terminals.

A semiconductor device and a power conversion device each comprise a drift layer, a gate electrode to face a well region and a source region via a gate insulating film, a source electrode provided on an interlayer insulating film covering the gate electrode and connected to the well region and the source region, a first separation region provided in an active region in which a plurality of MOSFETs each including the well region, the source region, and the gate electrode are arranged in the drift layer, the first separation region being provided to be connected to the drift layer and forming Schottky connection with the source electrode, and a surge current conduction region provided in the active region, and blocks connection between the source electrode and the drift layer, thereby enabling the achievement of a semiconductor device and a power conversion device that exhibit high surge tolerance.

A power supply facility for supplying an electrolysis plant with electrical energy has a rectifier and a first transformer arrangement with a primary side drawing electrical energy from an alternating voltage grid and a secondary side supplying the electrolysis plant with the electrical energy via a DC link. The power supply facility has an additional unit with a second transformer arrangement, a transistor power converter and a DC-DC converter. The primary side of the second transformer arrangement is connected in series with either the primary side or the secondary side of the first transformer arrangement. The transistor power converter is connected to the secondary side of the second transformer arrangement and the DC-DC converter. The DC-DC converter is connected to the DC link of the rectifier.