Patent classifications
H03F3/45677
Transconductance (gm) boosting transistor arrangement
A circuit may increase input transconductance. An input stage may include a field effect transistor (FET) that has a gate, source, drain, and body terminal. An amplifier may generate an amplified version of the input voltage received that is applied to the body terminal of the FET. Application of the amplified version to the body terminal of the FET may increase the transconductance of the FET compared to what it would be in the same circuit without the amplified version being applied to the body terminal of the FET.
Intrinsic MOS cascode differential input pair
Methods and devices for a cascode differential input pair with low headroom voltage and high output impedance are presented. The cascode differential input pair includes first and second input (cascode) stages, each including a common-source regular transistor in series connection with a common-gate intrinsic transistor. Sources of the regular transistors are tied, and gates of the intrinsic transistors are tied. A gate voltage to the intrinsic transistors is provided by a source voltage at the sources of the regular transistors, the source voltage based on a common mode input voltage of the cascode differential input pair. According to one aspect, the cascode differential input pair is part of a differential amplifier that includes a current source coupled to the sources of the regular transistors, and a load coupled to drains of the intrinsic transistors.