A sample and hold circuit providing rail-to rail equivalent output is described. The circuit includes a sample and hold amplifier containing two separate sets of sampling capacitors, one set is coupled to a PMOS transistor differential stage and the other set is coupled to an NMOS transistor differential stage. The differential stages drive a current mirror based push-pull output differential stage to provide an output signal with ranges equivalent to a rail-to rail output signal swing.

In a case in which an input offset voltage of a main amplification circuit deviates from a predetermined range, a retaining operation of retaining an output voltage of a low pass filter in a sample and hold circuit stops, and an output voltage of the low pass filter is directly output to a correction signal supply circuit. As a result, for example, negative feedback control is not temporarily performed due to influence or the like of an excessive input voltage on the main amplification circuit, and in a case in which the input offset voltage of the main amplification circuit deviates from the predetermined range, a response delay due to the retaining operation of the sample and hold circuit does not occur, and the response speed of an offset correction circuit increases.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

A sample and hold circuit providing rail-to rail equivalent output is described. The circuit includes a sample and hold amplifier containing two separate sets of sampling capacitors, one set is coupled to a PMOS transistor differential stage and the other set is coupled to an NMOS transistor differential stage. The differential stages drive a current mirror based push-pull output differential stage to provide an output signal with ranges equivalent to a rail-to rail output signal swing.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

In a semiconductor device, a first amplifier block operates in a holding mode for a first period to output a first tap voltage based on a first tap input voltage and an offset of a first gamma amplifier sampled. A second amplifier block operates in the holding mode during the first period to output a second tap voltage based on a second tap input voltage and an offset of a second gamma amplifier sampled. A third amplifier block operates in a sampling mode during the first period to sample an offset of a third gamma amplifier based on the second tap input voltage. Input terminal switches divide the first and second tap input voltages to the first to third amplifier blocks, and output terminal switches transmit the first tap voltage and the second tap voltage from at least some of the first to third amplifier block to a divider.

Described embodiments include an apparatus with a first amplifier having first inputs and first outputs. A second amplifier has second inputs and a second output. A first chopper circuit is coupled between third inputs and the first inputs. A second chopper circuit is coupled between the first outputs and the second inputs. A balanced filter is coupled to the second inputs.