Patent classifications
H03F3/45995
METHOD AND APPARATUS FOR REDUCING IMPACT OF TRANSISTOR RANDOM MISMATCH IN CIRCUITS
An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.
Method and apparatus for reducing impact of transistor random mismatch in circuits
An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.
SAMPLING AND HOLDING ELECTRICAL SIGNALS WITH RAIL-TO-RAIL EQUIVALENT OUTPUT SWING
A sample and hold circuit providing rail-to rail equivalent output is described. The circuit includes a sample and hold amplifier containing two separate sets of sampling capacitors, one set is coupled to a PMOS transistor differential stage and the other set is coupled to an NMOS transistor differential stage. The differential stages drive a current mirror based push-pull output differential stage to provide an output signal with ranges equivalent to a rail-to rail output signal swing.
Programmable amplifier and method of operating the same
A programmable amplifier includes an amplifier, an input capacitor, a feedback circuit, and a high-pass filter circuit. The amplifier has an input coupled to the input capacitor for receiving an input signal. The feedback circuit includes multiple feedback capacitors of differing capacitance values that are each selectively coupled between the output of the amplifier and the input of the amplifier using multiple first switches. The high-pass filter circuit includes multiple switched capacitors of differing capacitance values that are each selectively coupled between the amplifier output and a ground node using multiple second switches. The first switches are configured to be selectively switched on for activating at least one feedback capacitor to adjust a gain of the amplifier, while the second switches are configured to be selectively switched at a first and second phase of a clock signal to adjust a high-pass cutoff frequency of the amplifier independently of how the gain is adjusted.
Circuit element pair matching method and circuit
A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.
AMPLIFIER CALIBRATION
An amplifier circuit can include an amplifier and a resistor network coupled to the amplifier. The resistor network can include a range resistor coupled in parallel to a resistor string, and one or more switches coupled to the resistor string. The resistor network can be used to calibrate gain and common mode rejection ratio (CMRR) of the amplifier circuit.
PROGRAMMABLE AMPLIFIER AND METHOD OF OPERATING THE SAME
A programmable amplifier includes an amplifier, an input capacitor, a feedback circuit, and a high-pass filter circuit. The amplifier has an input coupled to the input capacitor for receiving an input signal. The feedback circuit includes multiple feedback capacitors of differing capacitance values that are each selectively coupled between the output of the amplifier and the input of the amplifier using multiple first switches. The high-pass filter circuit includes multiple switched capacitors of differing capacitance values that are each selectively coupled between the amplifier output and a ground node using multiple second switches. The first switches are configured to be selectively switched on for activating at least one feedback capacitor to adjust a gain of the amplifier, while the second switches are configured to be selectively switched at a first and second phase of a clock signal to adjust a high-pass cutoff frequency of the amplifier independently of how the gain is adjusted.
Sampling and holding electrical signals with rail-to-rail equivalent output swing
A sample and hold circuit providing rail-to rail equivalent output is described. The circuit includes a sample and hold amplifier containing two separate sets of sampling capacitors, one set is coupled to a PMOS transistor differential stage and the other set is coupled to an NMOS transistor differential stage. The differential stages drive a current mirror based push-pull output differential stage to provide an output signal with ranges equivalent to a rail-to rail output signal swing.
Amplifier system
An amplifier system is described. The amplifier system may amplify an audio signal transmitted via a connected loudspeaker in a first mode of operation. In a second mode of operation the amplifier system may amplify a signal generated by the loudspeaker operated in reverse as a microphone. Because a loudspeaker is less sensitive than a microphone the amplifier system may be used to acquire audio at high sound pressure levels for example at a concert or while making a phone-call in a noisy environment for example with a high level of wind noise.
Amplifier System
An amplifier system is described. The amplifier system may amplify an audio signal transmitted via a connected loudspeaker in a first mode of operation. In a second mode of operation the amplifier system may amplify a signal generated by the loudspeaker operated in reverse as a microphone. Because a loudspeaker is less sensitive than a microphone the amplifier system may be used to acquire audio at high sound pressure levels for example at a concert or while making a phone-call in a noisy environment for example with a high level of wind noise.