Patent classifications
H01L21/02129
Apparatus and method for semiconductor fabrication
An apparatus for processing a substrate is provided. The apparatus comprises a processing chamber and a showerhead. The showerhead is in the processing chamber and has a plurality of first holes with a first size in a first zone of the showerhead, a plurality of second holes with a second hole size in a second zone of the showerhead, and a plurality of third holes with a third hole size in a third zone of the showerhead. The first hole size is different from the second hole size. The first zone is surrounded by the second zone. An area of the first zone is larger than an area of the second zone. The first hole size is different from the third hole size. The first zone is surrounded by the third zone, and an area of the first zone is larger than an area of the third zone.
METHODS FOR FORMING DOPED SILICON OXIDE THIN FILMS
The present disclosure relates to the deposition of dopant films, such as doped silicon oxide films, by atomic layer deposition processes. In some embodiments, a substrate in a reaction space is contacted with pulses of a silicon precursor and a dopant precursor, such that the silicon precursor and dopant precursor adsorb on the substrate surface. Oxygen plasma is used to convert the adsorbed silicon precursor and dopant precursor to doped silicon oxide.
Method for forming boron-based film, formation apparatus
A method of forming a boron-based film mainly containing boron on a substrate includes forming, on the substrate, an adhesion layer containing an element contained in a surface of the substrate and nitrogen, and subsequently, forming the boron-based film on the adhesion layer.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MANUFACTURING APPARATUS
Provided is a method of manufacturing a semiconductor device capable of suppressing variation in thickness of oxide films among a plurality of SiC wafers. Forming first inorganic films on lower surfaces of a plurality of SiC wafer, and then performing etching of the plurality of SiC wafers so that 750 nm or more of the first inorganic film is left in thickness, and then forming oxide films on upper surfaces of the plurality of SiC wafers by performing thermal oxidation treatment in a state in which a first SiC wafer of the plurality of SiC wafers is placed directly below any one of at least one wafer, including at least one of a dummy wafer and a monitor wafer, and a second SiC wafer of the plurality of SiC wafers is placed directly below a third SiC wafer of the plurality of SiC wafers.
Semiconductor device having deep trench structure and method of manufacturing thereof
A semiconductor device includes etch stop films formed on the first gate electrode, the first source region, the first drain region, and the shallow trench isolation regions, respectively. First interlayer insulating films are formed on the etch stop film, respectively. Deep trenches are formed in the substrate between adjacent ones of the first interlayer insulating films to overlap the shallow trench isolation regions. Sidewall insulating films are formed in the deep trenches, respectively. A gap-fill insulating film is formed on the sidewall insulating film. A second interlayer insulating film is formed on the gap-fill insulating film. A top surface of the second interlayer insulating film is substantially planar and a bottom surface of the second interlayer insulating film is undulating.
SUBSTRATE PROCESSING METHOD
A substrate processing method of filling a recess without voids or seams includes least partially filling a trench with a first material on a substrate including the trench; and supplying at least one constituent element included in the first material and applying plasma to induce fluidization of the first material.
Integrated assemblies, and methods of forming integrated assemblies
Some embodiments include a method of forming an integrated assembly. A first stack is formed over a conductive structure. The first stack includes a second layer between first and third layers. The first and third layers are conductive. A first opening is formed through the first stack. A sacrificial material is formed within the first opening. A second stack is formed over the first stack. The second stack has alternating first and second levels. A second opening is formed through the second stack and through the sacrificial material. First semiconductor material is formed within the second opening. A third opening is formed through the second stack, through the third layer, and to the second layer. The second layer is removed, forming a conduit. Second semiconductor material is formed within the conduit. Dopant is out-diffused from the second semiconductor material into the first semiconductor material. Some embodiments include integrated assemblies.
METHOD OF PROCESSING SUBSTRATE, RECORDING MEDIUM, SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
There is provided a technique that includes: (a) supplying a metal element-containing gas to a substrate accommodated in a process vessel; (b) supplying a reducing gas to the substrate; (c) performing (a) and (b) a predetermined number of times to form a film containing a metal element on the substrate; (d) supplying a modifying gas to the film to form a layer including an element contained in the modifying gas on a surface of the film after (c); and (e) creating a rare gas atmosphere in the process vessel and in a transfer chamber adjacent to the process vessel and carrying the substrate out of the process vessel and into the transfer chamber after (d).
Interconnect structure for semiconductor device and methods of fabrication thereof
Methods and devices for forming a conductive line disposed over a substrate. A first dielectric layer is disposed over the substrate and coplanar with the conductive line. A second dielectric layer disposed over the conductive line and a third dielectric layer disposed over the first dielectric layer. A via extends through the second dielectric layer and is coupled to the conductive line. The second dielectric layer and the third dielectric layer are coplanar and the second and third dielectric layers have a different composition. In some embodiments, the second dielectric layer is selectively deposited on the conductive line.
SEMICONDUCTOR DEVICE INCLUDING HARD MASK STRUCTURE
Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.