Patent classifications
H01L21/0214
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium
There is provided a technique that includes: (a) arranging a plurality of first substrates and a second substrate having a smaller surface area than the first substrates and accommodating the plurality of first substrates and the second substrate in a process chamber; and (b) forming a thin film on each of the plurality of first substrates by supplying a processing gas to a substrate arrangement region in which the plurality of first substrates and the second substrate are arranged, wherein (b) includes: (c) supplying a dilution gas to a first supply region of the substrate arrangement region, or not performing a supply of the dilution gas to the first supply region, and supplying the dilution gas to at least one second supply region of the substrate arrangement region at a flow rate larger than a flow rate of the dilution gas supplied to the first supply region.
Semiconductor device having fully oxidized gate oxide layer and method for making the same
A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.
REDUCTION OF GATE-DRAIN CAPACITANCE
A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device is provided. The method includes a step of performing a chemical mechanical polishing process on a first silicon oxide layer to form a planar surface layer; surface treatment is performed on the planar surface layer to form a treated planarization layer, and a second silicon oxide layer is formed on the treated planarization layer.
Semiconductor device and method for fabricating the same
A method for fabricating a semiconductor device includes forming a stack structure including a horizontal recess over a substrate, forming a blocking layer lining the horizontal recess, forming an interface control layer including a dielectric barrier element and a conductive barrier element over the blocking layer, and forming a conductive layer over the interface control layer to fill the horizontal recess.
Manufacturing method of silicon carbide semiconductor device and silicon carbide semiconductor device
A manufacturing method of a silicon carbide semiconductor device may include: forming a gate insulating film on a silicon carbide substrate; and forming a gate electrode on the gate insulating film. The forming of the gate insulating film may include forming an oxide film on the silicon carbide substrate by thermally oxidizing the silicon carbide substrate under a nitrogen atmosphere.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
There is provided a technique that includes (a) forming a first film having a first thickness on an underlayer by supplying a first process gas not including oxidizing gas to a substrate, wherein the first film contains silicon, carbon, and nitrogen and does not contain oxygen, and the underlayer is exposed on a surface of the substrate and is at least one selected from the group of a conductive metal-element-containing film and a nitride film; and (b) forming a second film having a second thickness larger than the first thickness on the first film by supplying a second process gas including oxidizing gas to the substrate, wherein the second film contains silicon, oxygen, and nitrogen, and wherein in (b), oxygen atoms derived from the oxidizing gas and diffuse from a surface of the first film toward the underlayer are absorbed by the first film and the first film is modified.
Three-dimensional memory devices and fabrication methods thereof
Embodiments of a method for forming a three-dimensional (3D) memory device includes the following operations. First, a channel hole is formed in a stack structure of a plurality first layers and a plurality of second layers alternatingly arranged over a substrate. A semiconductor channel is formed by filling the channel hole with a channel-forming structure. The plurality of first layers is removed. A plurality of conductor layers is formed from the plurality of second layers. Further, a gate-to-gate dielectric layer is formed between the adjacent conductor layers, the gate-to-gate dielectric layer including at least one sub-layer of silicon oxynitride.
FinFETs and Methods of Forming FinFETs
An embodiment is a method including recessing a gate electrode over a semiconductor fin on a substrate to form a first recess from a top surface of a dielectric layer, forming a first mask in the first recess over the recessed gate electrode, recessing a first conductive contact over a source/drain region of the semiconductor fin to form a second recess from the top surface of the dielectric layer, and forming a second mask in the second recess over the recessed first conductive contact.