Patent classifications
H01L21/02178
METHODS AND SYSTEMS FOR DEPOSITION TO GAPS USING AN INHIBITOR
The present disclosure is directed to methods and systems for depositing a material within a gap of a substrate in a cyclic deposition process. The methods and systems utilize an inhibitor to preferentially blocks chemisorption of a subsequently introduced first precursor at a portion of available chemisorption sites in the gap to promote deeper penetration of the first precursor into the gap and/or more uniform chemisorption of the first precursor in the gap used in forming a desired material.
Semiconductor device gate spacer structures and methods thereof
A semiconductor device includes a substrate having a channel region; a gate stack over the channel region; a seal spacer covering a sidewall of the gate stack, the seal spacer including silicon nitride; a gate spacer covering a sidewall of the seal spacer, the gate spacer including silicon oxide, the gate spacer having a first vertical portion and a first horizontal portion; and a first dielectric layer covering a sidewall of the gate spacer, the first dielectric layer including silicon nitride.
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A method for fabricating a semiconductor device includes forming a stack structure including a horizontal recess over a substrate, forming a blocking layer lining the horizontal recess, forming an interface control layer including a dielectric barrier element and a conductive barrier element over the blocking layer, and forming a conductive layer over the interface control layer to fill the horizontal recess.
Semiconductor Device and Method of Forming the Same
A semiconductor device is provided in accordance with some embodiments. The semiconductor device includes an interfacial layer disposed over a channel region, a gate dielectric structure disposed over the channel region, and a gate electrode disposed over the gate dielectric structure. The gate dielectric structure includes a first layer of an oxide of a first metal disposed over the interfacial layer and a second layer of an oxide or silicate of a second metal disposed over the first layer. The first layer has a first thickness, and the second layer has second a thickness that is at least three times greater than the first thickness. An oxygen areal density of the oxide of the first metal is greater than an oxygen areal density of the oxide of the second metal.
Passivated nanoparticles
Passivated semiconductor nanoparticles and methods for the fabrication and use of passivated semiconductor nanoparticles is provided herein.
THIN-FILM TRANSISTOR AND PREPARATION METHOD THEREFOR, AND DISPLAY SUBSTRATE AND DISPLAY PANEL
Disclosed are a thin-film transistor and a preparation method therefor, and a display substrate and a display panel. The thin-film transistor includes: a base substrate; an active layer located on the base substrate; and a source-drain electrode which is located on the side of the active layer facing away from the base substrate, and includes an electrode layer and a protective layer, where the material of the electrode layer includes a first metal element; the protective layer covers the surface of the side of the electrode layer facing away from the base substrate, and a side face of the electrode layer; and the material of the protective layer is an oxide of the first metal element.
Semiconductor Device and Method For Manufacturing Semiconductor Device
A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.
Transistor Gate Structures and Methods of Forming the Same
In an embodiment, a method includes: forming a gate dielectric layer on a channel region of a semiconductor feature; depositing a work function tuning layer on the gate dielectric layer, the work function tuning layer including a first work function tuning element; depositing a capping layer on the work function tuning layer with atomic layer deposition, the capping layer formed of an oxide or a nitride; performing an anneal process while the capping layer covers the work function tuning layer, the anneal process driving the first work function tuning element from the work function tuning layer into the gate dielectric layer; removing the capping layer to expose the work function tuning layer; and depositing a fill layer on the work function tuning layer.
METHODS FOR SEAMLESS GAP FILLING OF DIELECTRIC MATERIAL
A method for dielectric filling of a feature on a substrate yields a seamless dielectric fill with high-k for narrow features. In some embodiments, the method may include depositing a metal material into the feature to fill the feature from a bottom of the feature wherein the feature has an opening ranging from less than 20 nm to approximately 150 nm at an upper surface of the substrate and wherein depositing the metal material is performed using a high ionization physical vapor deposition (PVD) process to form a seamless metal gap fill and treating the seamless metal gap fill by oxidizing/nitridizing the metal material of the seamless metal gap fill with an oxidation/nitridation process to form dielectric material wherein the seamless metal gap fill is converted into a seamless dielectric gap fill with high-k dielectric material.
TWO-DIMENSIONAL MATERIAL STRUCTURE, SEMICONDUCTOR DEVICE INCLUDING THE TWO-DIMENSIONAL MATERIAL STRUCTURE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
Provided are a two-dimensional material structure, a semiconductor device including the two-dimensional material structure, and a method of manufacturing the semiconductor device. The two-dimensional material structure may include a first insulator including a first dielectric material; a second insulator on the first insulator and including a second dielectric material; a first two-dimensional material film on an exposed surface of the first insulator; and a second two-dimensional material film provided on an exposed surface of the second insulator. The first and second two-dimensional material films may include a two-dimensional material having a two-dimensional layered structure, and the second two-dimensional material film may include more layers of the two-dimensional material than the first two-dimensional material film.