An integrated circuit structure comprises a silicon substrate and a III-nitride (III-N) substrate over the silicon substrate. A first III-N transistor and a second III-N transistor is on the III-N substrate. An insulator structure is formed in the III-N substrate between the first III-N transistor and the second III-N, wherein the insulator structure comprises one of: a shallow trench filled with an oxide, nitride or low-K dielectric; or a first gap adjacent to the first III-N transistor and a second gap adjacent to the second III-N transistor.

A method for filling a gap feature on a substrate surface is disclosed. The method may include: providing a substrate comprising a non-planar surface including one or more gap features; depositing a metal oxide film over a surface of the one or more gap features by a cyclical deposition process; contacting the metal oxide with an organic ligand vapor; and converting at least a portion of the metal oxide film to a porous material thereby filling the one or more gap features. Semiconductor structures including a metal-organic framework material formed by the methods of the disclosure are also disclosed.

Layered dielectric materials for use in controlling dielectric strength in microelectronic devices, especially as they relate to electrophoretic and electrowetting applications. Specifically, a combination of a first atomic layer deposition (ALD) step, a sputtering step, and a second ALD step result in a layer that is chemically robust and nearly pinhole free. The dielectric layer may be disposed on the transparent common electrode of an electrophoretic display or covering the pixelated backplane electrodes, or both.

A film forming method includes preparing a substrate having a first region in which a metal film or an oxide film of the metal film is exposed, and a second region in which an insulating film is exposed, supplying, to the substrate, an organic compound containing, in a head group, a triple bond between carbon atoms represented by Chemical Formula (1) described in the specification, causing the organic compound to be selectively adsorbed in the first region among the first region and the second region, and cleaving the triple bond in the first region and forming a hydrophobic film having a honeycomb structure of carbon atoms through polymerization.

Provided are a nitride semiconductor device and a manufacturing method thereof. The nitride semiconductor device includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first metal layer, a second metal layer and a dielectric layer. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer. The first metal layer is disposed in the second nitride semiconductor layer. The second metal layer is disposed on the second nitride semiconductor layer. The dielectric layer is disposed between the first metal layer and the second nitride semiconductor layer and/or between the second metal layer and the second nitride semiconductor layer.

A method for processing a substrate includes performing a cyclic plasma process including a plurality of cycles, each cycle of the plurality of cycles including purging a plasma processing chamber including the substrate with a first deposition gas including carbon. The substrate includes a first layer including silicon and a second layer including a metal oxide. The method further includes exposing the substrate to a first plasma generated from the first deposition gas to selectively deposit a first polymeric film over the first layer relative to the second layer; purging the plasma processing chamber with an etch gas including fluorine; and exposing the substrate to a second plasma generated from the etch gas to etch the second layer.

A method and apparatus are for controlling stress variation in a material layer formed via pulsed DC physical vapour deposition. The method includes the steps of providing a chamber having a target from which the material layer is formed and a substrate upon which the material layer is formable, and subsequently introducing a gas within the chamber. The method further includes generating a plasma within the chamber and applying a first magnetic field proximate the target to substantially localise the plasma adjacent the target. An RF bias is applied to the substrate to attract gas ions from the plasma toward the substrate and a second magnetic field is applied proximate the substrate to steer gas ions from the plasma to selective regions upon the material layer formed on the substrate.

Provided are methods of making a long-term implantable electronic device, and related implantable devices, including by providing a substrate having a first encapsulation layer that covers at least a portion of the substrate, the first encapsulation layer having a receiving surface; providing one or more electronic devices on the first encapsulation layer receiving surface; and removing at least a portion of the substrate from the first encapsulation layer; thereby making the long-term implantable electronic device. Further desirable properties, including device lifetime increases during use in environments that are challenging for sensitive electronic device components, are achieved through the use of additional layers such as longevity-extending layers and/or ion-barrier layers in combination with an encapsulation layer.

A method for manufacturing a semiconductor device according to an, exemplary embodiment of the present disclosure includes: forming a semiconductor layer on a substrate in a chamber; and forming a semiconductor layer on a substrate in a chamber. Forming the insulation layer includes: (a) injecting precursors that include a metal into a surface of the semiconductor layer; (b) removing precursors that are not adsorbed; (c) injecting reactants onto the surface of the semiconductor layer; and (d) removing residual reactants. The semiconductor layer includes a semiconductor material that has a layered structure.

A method includes placing a semiconductor substrate in a deposition chamber, wherein the semiconductor substrate includes a trench, and performing an atomic layer deposition (ALD) process to deposit a dielectric material within the trench, including flowing a first precursor of the dielectric material into the deposition chamber as a gas phase; flowing a second precursor of the dielectric material into the deposition chamber as a gas phase; and controlling the pressure and temperature within the deposition chamber such that the second precursor condenses on surfaces within the trench as a liquid phase of the second precursor, wherein the liquid phase of the second precursor has capillarity.