H01L21/02189

METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE AND RELATED SEMICONDUCTOR STRUCTURES
20230170207 · 2023-06-01 ·

A method for filling a gap feature on a substrate surface is disclosed. The method may include: providing a substrate comprising a non-planar surface including one or more gap features; depositing a metal oxide film over a surface of the one or more gap features by a cyclical deposition process; contacting the metal oxide with an organic ligand vapor; and converting at least a portion of the metal oxide film to a porous material thereby filling the one or more gap features. Semiconductor structures including a metal-organic framework material formed by the methods of the disclosure are also disclosed.

Methods and Precursors for Selective Deposition of Metal Films

Methods and precursors for selectively depositing a metal film on a silicon nitride surface relative to a silicon oxide surface are described. The substrate comprising both surfaces is exposed to a blocking compound to selectively block the silicon oxide surface. A metal film is then selectively deposited on the silicon nitride surface.

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

A semiconductor device includes a substrate, a gate structure over the substrate, and source/drain regions in the substrate and on opposite sides of the gate structure. The gate structure includes an interfacial layer, a quasi-antiferroelectric (QAFE) layer over the interfacial layer, and a gate electrode over the QAFE layer. The QAFE layer includes Hf.sub.1−xZr.sub.xO.sub.2, in which x is greater than 0.5 and is lower than 1.

Substrate processing tool with integrated metrology and method of using
11264254 · 2022-03-01 · ·

A substrate processing tool configured for performing integrated substrate processing and substrate metrology, and methods of processing a substrate. The substrate processing tool includes a substrate transfer chamber, a plurality of substrate processing chambers coupled to the substrate transfer chamber, and a substrate metrology module coupled to the substrate transfer chamber. A substrate processing method includes processing a substrate in a first substrate processing chamber of a substrate processing tool, transferring the substrate from the first substrate processing chamber through a substrate transfer chamber to a substrate metrology module in the substrate processing tool, performing metrology on the substrate in the substrate metrology module, transferring the substrate from the substrate metrology module to a second substrate processing chamber through the substrate transfer chamber, and processing the substrate in the second substrate processing chamber.

PASSIVATION AGAINST VAPOR DEPOSITION
20220349059 · 2022-11-03 ·

Passivation layers to inhibit vapor deposition can be used on reactor surfaces to minimize deposits while depositing on a substrate housed therein, or on particular substrate surfaces, such as metallic surfaces on semiconductor substrates to facilitate selective deposition on adjacent dielectric surfaces. Passivation agents that are smaller than typical self-assembled monolayer precursors can have hydrophobic or non-reactive ends and facilitate more dense passivation layers more quickly than self-assembled monolayers, particularly over complex three-dimensional structures.

Method for forming multi-layer film and patterning process

A method for forming multi-layer film on substrate, which includes steps (1) forming under layer film on substrate by applying under layer film material containing resin having repeating unit represented by the general formula (1) or (2) in which fluorene structure is contained, and curing the same by heat treatment, (2) forming metal oxide film on the under layer film by applying metal oxide film material selected from titanium oxide film material, zirconium oxide film material, and hafnium oxide film material, (3) forming hydrocarbon film on metal oxide film by applying hydrocarbon film material, and (4) forming silicon oxide film on the hydrocarbon film by applying silicon oxide film material. There can be provided a method for forming multi-layer film that can reduce reflectance, and useful for a patterning process with high dimensional accuracy of dry etching. ##STR00001##

Methods of forming a semiconductor device by thermally treating a cleaned surface of a semiconductor substrate in a non-oxidizing ambient

The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å.

METHODS FOR FORMING A LAMINATE FILM BY CYCLICAL PLASMA-ENHANCED DEPOSITION PROCESSES
20220059340 · 2022-02-24 ·

Methods for forming a laminate film on substrate by a plasma-enhanced cyclical deposition process are provided. The methods may include: providing a substrate into a reaction chamber, and depositing on substrate a metal oxide laminate film by alternatingly depositing a first metal oxide film and a second metal oxide film different from the first metal oxide film, wherein depositing the first metal oxide film and the second metal oxide film comprises, contacting the substrate with sequential and alternating pulses of a metal precursor and an oxygen reactive species generated by applying RF power to a reactant gas comprising at least nitrous oxide (N.sub.2O).

METHODS FOR SELECTIVELY FORMING A TARGET FILM ON A SUBSTRATE COMPRISING A FIRST DIELECTRIC SURFACE AND A SECOND METALIC SURFACE
20220367185 · 2022-11-17 ·

Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface are disclosed. The methods may include: contacting the substrate with a plasma generated from a hydrogen containing gas, selectively forming a passivation film from vapor phase reactants on the first dielectric surface while leaving the second metallic surface free from the passivation film, and selectively depositing the target film from vapor phase reactants on the second metallic surface relative to the passivation film.

Vertical metal insulator metal capacitor having a high-K dielectric material

A vertical metal-insulator-metal (MIM) capacitor is formed within multiple layers of a multi-level metal interconnect system of a chip. The vertical MIM capacitor has a first electrode, a second electrode, and a high-k capacitor dielectric material disposed therebetween. The dielectric constant of the capacitor dielectric material is greater than the dielectric constant of interlayer dielectric (ILD) material. After ILD is removed from between the vertically-oriented, interdigitated portions of the first and second electrodes, a capacitor dielectric material having a dielectric constant greater than the ILD dielectric material is disposed therebetween.