H01L21/02274

Fin Field-Effect Transistor Device and Method
20230025645 · 2023-01-26 ·

A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a recess between gate spacers of the gate structure by recessing the gate structure below upper surfaces of the gate spacers; depositing a first layer of a dielectric material in the recess along sidewalls and a bottom of the recess; after depositing the first layer, performing a first etching process to remove portions of the first layer of the dielectric material; and after the first etching process, depositing a second layer of the dielectric material in the recess over the first layer of the dielectric material.

METHOD FOR TRANSFERRING A THIN LAYER ONTO A SUPPORT SUBSTRATE PROVIDED WITH A CHARGE-TRAPPING LAYER

A method for transferring a thin layer onto a carrier substrate comprises preparing a carrier substrate using a preparation method involving supplying a base substrate having, on a main face, a charge-trapping layer and forming a dielectric layer having a thickness greater than 200 nm on the charge-trapping layer. Once the dielectric layer is formed, the ionized deposition and sputtering of the dielectric layer are simultaneously performed. The transfer method also comprises assembling, by way of molecular adhesion and with an unpolished free face of the dielectric layer, a donor substrate to the dielectric layer of the carrier substrate, the donor substrate having an embrittlement plane defining the thin layer. Finally, the method comprises splitting the donor substrate at the embrittlement plane to release the thin layer and to transfer it onto the carrier substrate.

Formation of SiOC thin films

Methods for depositing silicon oxycarbide (SiOC) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor that does not comprise nitrogen and a second reactant that does not include oxygen. In some embodiments the methods allow for the deposition of SiOC films having improved acid-based wet etch resistance.

Semiconductor structure

A semiconductor structure is provided. The semiconductor structure includes a base substrate including a plurality of non-device regions; a middle fin structure and an edge fin disposed around the middle fin structure on the base substrate between adjacent non-device regions; a first barrier layer on sidewalls of the edge fin; and an isolation layer on the base substrate. The isolation layer has a top surface lower than the edge fin and the middle fin structure, and covers a portion of the sidewalls of each of the edge fin and the middle fin structure. The isolation layer further has a material density smaller than the first barrier layer.

Substrate processing chamber

Embodiments of the present disclosure generally relate to apparatus and methods utilized in the manufacture of semiconductor devices. More particularly, embodiments of the present disclosure relate to a substrate processing chamber, and components thereof, for forming semiconductor devices.

PEALD Nitride Films

A method of depositing nitride films is disclosed. Some embodiments of the disclosure provide a PEALD process for depositing nitride films which utilizes separate reaction and nitridation plasmas. In some embodiments, the nitride films have improved growth per cycle (GPC) relative to films deposited by thermal processes or plasma processes with only a single plasma exposure. In some embodiments, the nitride films have improved film quality relative to films deposited by thermal processes or plasma processes with only a single plasma exposure.

Substrate processing method

A substrate processing method capable of achieving uniform etch selectivity in the entire thickness range of a thin film formed on a stepped structure includes: forming a thin film on a substrate by performing a plurality of cycles including forming at least one layer and applying plasma to the at least one layer under a first process condition; and applying plasma to the thin film under a second process condition different from the first process condition.

N-alkyl substituted cyclic and oligomeric perhydridosilazanes, methods of preparation thereof, and silicon nitride films formed therefrom
11702434 · 2023-07-18 · ·

Novel N-alkyl substituted perhydridocyclic silazanes, oligomeric N-alkyl perhydridosilazane compounds, and N-alkylaminodihydridohalosilanes, and a method for their synthesis are provided. The novel compounds may be used to form high silicon nitride content films by thermal or plasma induced decomposition.

Dielectric structure to prevent hard mask erosion

A novel dielectric cap structure for VTFET device fabrication is provided. In one aspect, a method of forming a VTFET device includes: patterning fins in a substrate using fin hardmasks, including a first fin(s) and a second fin(s); depositing a liner over the fins and the fin hardmasks; selectively forming first hardmask caps on top of the fin hardmasks/liner over the first fin(s); forming first bottom source and drain at a base of the first fin(s) while the fin hardmasks/liner over the first fin(s) are preserved by the first hardmask caps; selectively forming second hardmask caps on top of the fin hardmasks/liner over the second fin(s); and forming second bottom source and drains at a base of the second fin(s) while the fin hardmasks/liner over the second fin(s) are preserved by the second hardmask caps. A device structure is also provided.

Void Elimination for Gap-Filling In High-Aspect Ratio Trenches

A method of forming a semiconductor device includes: forming a dummy gate over a fin, where the fin protrudes above a substrate; surrounding the dummy gate with a dielectric material; and replacing the dummy gate with a replacement gate structure, where replacing the dummy gate includes: forming a gate trench in the dielectric material, where forming the gate trench includes removing the dummy gate; forming a metal-gate stack in the gate trench, where forming the metal-gate stack includes forming a gate dielectric layer, a first work function layer, and a gap-filling material sequentially in the gate trench; and enlarging a volume of the gap-filling material in the gate trench.