A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.

A method for forming a semiconductor structure includes forming a fin on a semiconductor substrate. The fin includes channel layers and sacrificial layers stacked one on top of the other in an alternating fashion. The method also includes removing a portion of the fin to form a first opening and expose vertical sidewalls of the channel layers and the sacrificial layers, epitaxially growing a source/drain feature in the first opening from the exposed vertical sidewalls of the channel layers and the sacrificial layers, removing another portion of the fin to form a second opening to expose a vertical sidewall of the source/drain feature, depositing a dielectric layer in the second opening to cover the exposed vertical sidewall of the source/drain feature, and replacing the sacrificial layers with a metal gate structure in the second opening. The dielectric layer separates the source/drain feature from contacting the metal gate structure.

A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.

A method of nitridation includes cyclically performing the following steps in situ within a processing chamber at a temperature less than about 400° C.: treating an unreactive surface of a substrate in the processing chamber to convert the unreactive surface to a reactive surface by exposing the unreactive surface to an energy flux, and nitridating the reactive surface using a nitrogen-based gas to convert the reactive surface to a nitride layer including a subsequent unreactive surface.

A method of scaling a nonvolatile trapped-charge memory device and the device made thereby is provided. In an embodiment, the method includes forming a channel region including polysilicon electrically connecting a source region and a drain region in a substrate. A tunneling layer is formed on the substrate over the channel region by oxidizing the substrate to form an oxide film and nitridizing the oxide film. A multi-layer charge trapping layer including an oxygen-rich first layer and an oxygen-lean second layer is formed on the tunneling layer, and a blocking layer deposited on the multi-layer charge trapping layer. In one embodiment, the method further includes a dilute wet oxidation to densify a deposited blocking oxide and to oxidize a portion of the oxygen-lean second layer.

A method of nitridation includes cyclically performing the following steps in situ within a processing chamber at a temperature less than about 400° C.: directing an energy flux to a localized region of an unreactive surface of a substrate to convert the localized region of the unreactive surface to a localized reactive region: and selectively nitridating the localized reactive region using a nitrogen-based gas to convert the localized reactive region to a nitride layer.

A method and apparatus for growing an oxide layer within a feature of a substrate is described herein. The method is suitable for use in semiconductor manufacturing. The oxide layer is formed by exposing a substrate to both a high pressure oxidant exposure and a lower pressure oxygen containing plasma exposure. The high pressure oxidant exposure is performed at a pressure of greater than 10 Torr, while the lower pressure oxygen containing plasma exposure is performed at a pressure of less than about 10 Torr. The features are high-aspect ratio trenches or holes within a stack of silicon oxide and silicon nitride layers.

In a method of fabricating a nonvolatile memory device according an embodiment, a first tunnel oxide layer, a nitrogen supply layer, and a second tunnel oxide layer having a density lower than that of the first tunnel oxide layer are formed on a substrate. Nitrogen in the nitrogen supply layer is diffused into the second tunnel oxide layer to convert at least a portion of the second tunnel oxide layer into an oxynitride layer.

A method for manufacturing a semiconductor includes: providing a substrate; forming a polysilicon layer on the substrate, a surface, away from the substrate, of the polysilicon layer having a native oxide; and performing a nitriding treatment to the native oxide, to nitrogenize the native oxide into a silicon oxynitride layer. The native oxide is nitrogenized into the silicon oxynitride layer.

A semiconductor device structure and a formation method are provided. The method includes forming a sacrificial base layer over a substrate and forming a semiconductor stack over the sacrificial base layer. The semiconductor stack has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes forming a gate stack to partially cover the sacrificial base layer, the semiconductor layers, and the sacrificial layers. The method further includes removing the sacrificial base layer to form a recess between the substrate and the semiconductor stack. In addition, the method includes forming a metal-containing dielectric structure to partially or completely fill the recess. The metal-containing dielectric structure has multiple sub-layers.