A method for fabricating handling wafer includes providing a substrate, having a front side and a back side. The front side of the substrate is disposed on a supporting pin. A first oxide layer is formed surrounding the substrate. A portion of the first oxide layer is removed to expose the front side of the substrate. An alignment mark is formed on the front side of the substrate.

According to one embodiment, an electronic device includes a first substrate including a first basement and a first conductive layer, a second substrate including a second basement opposed to the first basement and the first conductive layer, and a second conductive layer, a sealing material located between the first substrate and the second substrate to bond the first substrate to the second substrate, a contact hole penetrating the second basement, the sealing material and the first conductive layer, and a connecting material electrically connecting the first conductive layer with the second conductive layer via the contact hole.

A radio frequency identification (RFID) reader sequentially carries out inventory rounds with passive RFID sensor tags. Each RFID sensor tag has at least one sensing element arranged to sense a predetermined quantity. The reader reads one value of the predetermined quantity based on a backscattering modulation frequency used by the passive RFID sensor tag during each inventory round and releases the RFID sensor tag prior to reading next value of the predetermined quantity based on a backscattering modulation frequency used by the passive RFID sensor tag during a subsequent inventory round. If the passive RFID sensor comprises two or more sensing elements having different sensor characteristics, the reader reads one of the sensing elements of the passive RFID tag during one inventory round and releases the passive RFID sensor tag prior to reading another one of the sensing elements of the passive RFID sensor tag during a subsequent inventory round.

A semiconductor package and a method of forming the same are provided. The semiconductor package includes an interconnect structure, first connectors, a die, second connectors, a circuit board and a mark structure. The interconnect structure includes vias and lines stacked alternately and electrically connected to each other and embedded by polymer layers. The first connectors are disposed on a first side of the interconnect structure. The die is bonded to the first connectors. The second connectors are disposed on a second side of the interconnect structure. The circuit board is bonded to the second connectors. The mark structure is embedded in a first polymer layer among the polymer layers closest to the die and electrically insulated from the vias, the lines and the first connectors.