Various embodiments of the present application are directed towards a method for forming an integrated chip in which a group III-V device is bonded to a substrate, as well as the resulting integrated chip. In some embodiments, the method includes: forming a chip including an epitaxial stack, a metal structure on the epitaxial stack, and a diffusion layer between the metal structure and the epitaxial stack; bonding the chip to a substrate so the metal structure is between the substrate and the epitaxial stack; and performing an etch into the epitaxial stack to form a mesa structure with sidewalls spaced from sidewalls of the diffusion layer. The metal structure may, for example, be a metal bump patterned before the bonding or may, for example, be a metal layer that is on an etch stop layer and that protrudes through the etch stop layer to the diffusion layer.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.

An apparatus, comprising an integrated circuit (IC) package having at least one solder bond pad, a die having at least one solder bond pad, wherein the die is bonded to the IC package by at least one solder joint between the at least one solder bond pad of the die, and the at least one solder bond pad of the IC package, and an underfill material between the IC package and the die, wherein the at least one solder joint is embedded in the underfill material, and wherein the at least one solder joint comprises a first metallurgy and a second metallurgy.

An apparatus, comprising an integrated circuit (IC) package having at least one solder bond pad, a die having at least one solder bond pad, wherein the die is bonded to the IC package by at least one solder joint between the at least one solder bond pad of the die, and the at least one solder bond pad of the IC package, and an underfill material between the IC package and the die, wherein the at least one solder joint is embedded in the underfill material, and wherein the at least one solder joint comprises a first metallurgy and a second metallurgy.

Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

A core material including a core and a solder plating layer of a (SnBi)-based solder alloy made of Sn and Bi on a surface of the core. Bi in the solder plating layer is distributed in the solder plating layer at a concentration ratio in a predetermined range of, for example, 91.7% to 106.7%. Bi in the solder plating layer is homogeneous, and thus, a Bi concentration ratio is in a predetermined range over the entire solder plating layer including an inner circumference side and an outer circumference side in the solder plating layer.

The present invention is a flip-chip photodetector, comprising a carrier and a back-illuminated chip having a central portion and a peripheral portion, wherein the central portion has a greater thickness than the peripheral portion; the peripheral portion is provided with a plurality of metal pillars connected to the carrier, and the back illuminated chip is connected to the carrier by the plurality of metal pillars; further, the plurality of the metal pillars are provided on the back-illuminated chip by electroless plating.

The present invention is a flip-chip photodetector, comprising a carrier and a back-illuminated chip having a central portion and a peripheral portion, wherein the central portion has a greater thickness than the peripheral portion; the peripheral portion is provided with a plurality of metal pillars connected to the carrier, and the back illuminated chip is connected to the carrier by the plurality of metal pillars; further, the plurality of the metal pillars are provided on the back-illuminated chip by electroless plating.