An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control unit, and a plurality of inductors coupled to an output node. The PCH receives a voltage feedback signal corresponding to an output voltage at the output node, and outputs a control signal based on a difference between the voltage feedback signal and a reference voltage. The DRMOS control unit includes a plurality of switch transistors and a DRMOS controller. The switch transistors are coupled to the output node through the plurality of inductors. The DRMOS controller includes logic to determine an output current based on the control signal from the PCH, and to determine a distribution of the output current through the plurality of inductors. Transistor drivers control the switch transistors to share the output current through the plurality of inductors based on the determined output current and distribution.

A system for charging a battery includes three sub-modules, each receiving a respective phase of a three-phase alternating current (AC) signal. The three sub-modules cooperate to transform the respective phases of the three-phase AC signal to a direct current (DC) signal by passing the respective phases of the three-phase AC signal through a respective semiconductor device configured to discontinuously modulate the respective phase of the three-phase AC signal to convert it to a DC signal provided to the battery to charge the battery.

A synchronous rectification control circuit for controlling a switching circuit comprising a synchronous rectifier switch, can include: a drive circuit configured to generate a drive signal to control switching states of the synchronous rectifier switch; and a voltage regulation circuit configured to control the drive circuit to adjust an amplitude of the drive signal to decrease to a preset threshold in an adjustment state when a drain-source voltage of the synchronous rectifier switch is greater than an adjustment threshold before the synchronous rectifier switch is turned off, where a time that the voltage regulation circuit is in the adjustment state is an adjustment time.

A circuit device includes a first switching circuit that has one end connected to an output node, and turns on and off according to a drive signal, a second switching circuit that is connected in series with an impedance element between another end of the first switching circuit and a node having a predetermined potential, and turns off and on complementarily with the first switching circuit, a comparator circuit that outputs an output signal indicating whether or not a potential of the other end of the first switching circuit is higher than a determination level, and a control circuit that controls a level of the drive signal based on the output signal of the comparator such that the switching element enters a non-conduction state.

A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

A driver of a power switch is described that is used to supply power to a load for at least a switching cycle of the power switch. The driver includes at least one output that contains a high-ohmic output and a low-ohmic output. The high-ohmic output is enabled during at least one portion of a first phase of the switching cycle when the power switch is switched-off. The low-ohmic output is enabled during a second phase of the switching cycle when the power switch is switched-on and during any remaining portion of the first phase other than the at least one portion of the first phase when the high-ohmic output is enabled.

A resonant inverter includes first and second switches, first and second capacitive elements, a first coil, a second coil, a third coil, and a third capacitive element. The first and second switches are alternately turned on and off. The first and second capacitive elements are connected in parallel to the first switch and the second switch, respectively. The first coil is disposed between the first switch and an input voltage terminal. The second coil is disposed between the second switch and the input voltage terminal. The third coil and a third capacitive element are connected in series to each other and connected in parallel to a series circuit of the first and second coils. The first and second capacitive elements and the first and second coils constitute a plurality of first resonant circuits. The third coil and the third capacitive element constitute a single second resonant circuit.

A DC/DC converter includes: duty command calculation units for calculating duty command values for first, second, third, and fourth switching elements on the basis of difference voltage between a high-voltage-side voltage command value and a high-voltage-side voltage detection value; and a phase shift duty command calculation unit for calculating a phase shift duty command value corresponding to a phase difference between gate signals for the first and fourth switching elements and gate signals for the second and third switching elements, on the basis of difference voltage between a voltage target value and a charge voltage detection value of a charge/discharge capacitor, wherein gate signals for driving the first, second, third, fourth switching elements are generated on the basis of the duty command values and the phase shift duty command value.

A system including a first power transistor including a gate, a second power transistor including a gate and connected in series with the first power transistor, wherein the connection between the transistors defines a switch node is disclosed. The system further includes a pulse width modulator (PWM) controller configured to assert control signals to the gates of the first and second power transistors, a high side sensing circuit coupled to the gate and a drain of the first power transistor. The system further includes a low side sensing circuit coupled to the gate and a drain of the second power transistor, and a track and hold circuit coupled to the high and low side sensing circuits and configured to couple sense signals from the high and low side sensing circuits.

A DC/DC converter includes: electronic components group including a first capacitor, a high-voltage-side switching element, a low-voltage-side switching element, an inductor, and a second capacitor and constituting a half-bridge circuit; and a substrate including a high-voltage region, a low-voltage region, a connection region, and a pair of ground regions. The first capacitor is mounted across one of the ground regions and the high-voltage region. The high-voltage-side switching element is mounted across the high-voltage region and the connection region. The low-voltage-side switching element is mounted across the connection region and one of the ground regions. The inductor is mounted across the connection region and the low-voltage region. The second capacitor is mounted across the low-voltage region and one of the ground regions.