The present disclosure provides a power supply control device. The power supply control device includes an error amplifier, generating an error voltage according to a difference between a feedback voltage and a reference voltage; a slope voltage generation circuit, generating a slope voltage of a lamp waveform according to an inductor current; a reference voltage generation circuit, generating the reference voltage that depends on an output voltage; a first comparator, generating a reset signal by comparing the error voltage and the slope voltage; a second comparator, generating a skip signal by comparing the error voltage and the reference voltage; an oscillator, generating a set signal; and a controller, receiving an input of each of the signals (set, reset and skip) and performing a switching drive of an output stage in either a fixed on-time control operation or a fixed frequency current mode operation.

The disclosure relates to a control circuit and control method of a DC/DC converter, and a power management circuit. A control circuit of a DC/DC converter with a stable switching frequency is provided. An on-time generating circuit asserts a turn-off signal after an on time has elapsed from turning-on of a switching transistor. A charging circuit charges a capacitor with a charging current corresponding to an input voltage of the DC/DC converter. A frequency stabilizing circuit generates a control signal such that a switching frequency of the switching transistor approximates a reference frequency. A second comparator compares a slope voltage generated in the capacitor with the threshold voltage corresponding to the control signal, and generates the turn-off signal according to a comparison result.

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

A buck voltage regulator device comprises a coupled inductor, a high-side switch electrically connected between an electrical energy source and a primary winding of the coupled inductor, a first low-side switch electrically connected between the primary winding and a ground node, a second low-side switch electrically connected between an auxiliary winding of the coupled inductor and the ground node, a first output node electrically connected to the primary winding, a second output node electrically connected to the auxiliary winding, a first output storage capacitor electrically connected to the primary winding between the first output node and the ground node, and a second output storage capacitor electrically connected to the auxiliary winding and between the second output node and the ground node.

A power drive circuit includes a power conversion module, a plurality of gate drivers, a waveform processing unit, a control unit, a weighting unit, and a comparator. Each gate driver includes a drive resistance setting value. The waveform processing unit outputs a current absolute value waveform of an AC power. The weighting unit generates a trigger voltage. When the comparator determines that the current absolute value waveform is greater than the trigger voltage, the comparator outputs a slew rate control signal to each of the gate drivers. When the gate driver receives the slew rate control signal, each of the gate drivers decreases the drive resistance setting value of the gate driver.

The present document relates to power converters. A power converter may be configured to convert an input voltage at an input of the power converter into an output voltage at an output of the power converter. The power converter may comprise a first switching circuit with a first inductor, a first high-side switching element, and a first low-side switching element. The power converter may comprise a second switching circuit with a second inductor, a second high-side switching element, and a second low-side switching element. The power converter may comprise a capacitive element having a first terminal coupled to the first high-side switching element and to the second high-side switching element and having a second terminal coupled to the first low-side switching element at a first node. The power converter may comprise a third switching element coupled between the first node and the output of the power converter.

A system includes a current mirror coupled to a first transistor, the first transistor includes a first gate, a first current terminal, and a second current terminal, a controller coupled to the current mirror and a converter, the controller is to output a delayed signal for a second transistor, the second transistor being a part of the converter, and a source voltage coupled to the current mirror.

A control method and a control circuit for a switching power supply circuit and the switching power supply circuit. The switching power supply circuit includes a main switching transistor, a synchronous rectifier and an inductive element. When a switching signal indicates that the synchronous rectifier is turned from on to off, and the main switching transistor is turned from off to on, a gate voltage of the synchronous rectifier is pulled down to be lower than a threshold voltage of the synchronous rectifier and higher than a zero voltage by using a resistor-capacitor delay effect and timing is started. When a gate voltage of the main switching transistor is detected to rise to a first voltage or the timing reaches a first time, the gate voltage of the synchronous rectifier is pulled down to the zero voltage.

A switched mode power supply comprises a control signal generator arranged to generate first and second control signals via first and second outputs, respectively, which are coupled to respective first and second inputs of a switching stage, by means of respective first and second control signal paths. The switching stage is arranged to, responsive to the first and second control signals, alternately charge and discharge the reactive element by coupling it alternately to first and second supply voltages. An adjustable delay stage in one of the first and second signal paths is arranged to control an adjustable delay so that a first delay experienced by the first control signal passing from the control signal generator's first output to the switching stage's first input is substantially equal to a second delay experienced by the second control signal passing from the control signal generator's second output to the switching stage's second input.

A control circuit for a power converter comprising switching transistors and an output inductor is disclosed. One terminal of the output inductor serves as an output node, and another terminal of the output inductor serves as a switching node. The control circuit is configured to generate a control signal for controlling switching transistors in the power converter. The control circuit includes: a RC oscillator network connected to two terminals of the output inductor, the RC oscillator network configured to generate an oscillation signal containing a feedback ramp slope compensation component in response to a change in a voltage across the terminals of the output inductor; a comparator; an on-time generation circuit; and a control signal generation circuit to generate the control signal for controlling the switching transistors in the power converter.