GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

In an embodiment, a voltage converter includes: a first transistor coupled between an internal node and a first node receiving a supply voltage; a second transistor coupled between the internal node and a second node receiving a reference voltage; an inductance coupled between the internal node and an output node; a first circuit controlling the first and second transistors; and a second circuit configured to detect, when the first and second transistors are in the off state, when the voltage of the internal node is equal to the voltage of the output node, to condition a switching to the on state of the first transistor.

Example implementations include a method of obtaining an input voltage of a power converter circuit and a system voltage of the power converter circuit, obtaining a voltage rate gain based on an aggregate inductance of the power converter circuit, and in accordance with a determination that the input voltage and the system voltage are not equal, generating a rate offset voltage based on the voltage rate gain and the system voltage difference. Example implementations also include a device with a rate predictor device operatively coupled to an input voltage node and a system voltage node, and configured to obtain an input voltage of a power converter circuit and a system voltage of the power converter circuit, configured to obtain a voltage rate gain based on an aggregate inductance of the power converter circuit, and configured to, in accordance with a determination that the input voltage and the system voltage are not equal, generate a rate offset voltage based on the voltage rate gain and the system voltage difference.

A buck-boost converter including an inductor, a first transistor, a second transistor, a third transistor, a fourth transistor, a voltage detection circuit, and a voltage control circuit is provided. The first transistor is coupled to a first terminal of the inductor and receives a first control signal. The second transistor is coupled to the first terminal of the inductor and receives a second control signal. The third transistor is coupled to a second terminal of the inductor and receives a third control signal. The fourth transistor is coupled to the second terminal of the inductor and receives a fourth control signal voltage. The detection circuit detects the third control signal to selectively provide a voltage drop indication signal. When a voltage conversion mode is a buck mode, the voltage control circuit switches a conduction state of the third control signal in response to the voltage drop indication signal.

In an embodiment, a method for operating a voltage step-down switched mode power supply includes delivering an output voltage with an output stage having a power transistor that is cyclically made conducting by a first control signal. In PWM mode, the method includes generating an error voltage based on the output voltage and a reference voltage, and applying a first delay on a first control signal. The first delay is determined so as to reduce a difference between the error voltage and the reference voltage.

In an example, a system includes a single-output flyback/LLC converter adapted to be coupled to an alternating current (AC) power supply. The system also includes a buck regulator coupled to the single-output flyback/LLC converter. The system includes a first LED including an anode coupled to the single-output flyback/LLC converter and a cathode coupled to the buck regulator. The system also includes a second LED including an anode coupled to the single-output flyback/LLC converter and a cathode coupled to a ground terminal.

A circuit includes an output node and an amplifier and first and second branches coupled between power supply and reference nodes. The first branch includes a first switching device coupled between a first amplifier input and the reference node, the second branch includes a second switching device coupled between the output node and a second amplifier input, and a third switching device is coupled between the power supply and output nodes. Responsive to a first voltage level on the power supply node, each of the first and second switching devices is switched off and the third switching device is switched on, and responsive to a second voltage level on the power supply node greater than the first voltage level, each of the first and second switching devices is switched on and the third switching device is switched off.

There is provided a switching power supply device, including: an output stage circuit including an output transistor installed between an application end of an input voltage and an application end of an output voltage, and configured to generate the output voltage from the input voltage through a switching operation including an operation of switching the output transistor; and a main control circuit configured to execute PWM control for causing the output stage circuit to perform the switching operation at a predetermined PWM frequency based on a feedback voltage according to the output voltage.

GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

A power switch current sensing circuit includes matching first and second transistors having sources connected to first and second terminals, respectively, of the power switch. A current mirror has a first node coupled to a drain of the first transistor and a second node coupled to a drain of the second transistor. The current mirror sinks a current from the first node equal to a current flowing through the second transistor. A biasing circuit provides a same biasing voltage to the control terminals of the first and second transistors. An output resistance is coupled between the first node and a reference voltage node. A difference between a current flowing through the first transistor and the current sunk by the current mirror circuit from the first node flows through the output resistance. An output voltage produced at the first node is indicative of the current flowing through the power switch.