This present invention is an invented synchronous clock generator for the multiphase DC-DC converter system, comprising a front-end buffer circuit, a ramp signal generator circuit, a configurable equally divided reference voltage generator circuit, a set of comparators, a 10-ns pulse generator, multiple 30-ns pulse generators, and a pulse combination circuit. The synchronous clock generator can produce a clock pulse signal SYNC at N (total phase number) times the single-phase switching frequency. Within one synchronous loop period, a 10-ns pulse is first generated and followed by N-1 30-ns pulses. The master power stage chip detects the 10-ns pulse, and all the slave power stages detect and count the 30-ns pulses to determine when to set their output signal PWM. Thus, the invention can produce the new SYNC signal immediately with balanced phase shift while allowing the changing of the total phase number N by the total phase number register.

GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

A power supply includes a storage component to store an output current value representative of a magnitude of output current supplied by an output voltage of a power converter to power a load. The power supply further includes an offset reference generator and a controller. The offset reference generator produces an offset reference signal, the output current value being offset by the offset reference signal. The controller controls generation of the output voltage of the power converter as a function of the offset output current value with respect to a threshold signal (value). Additionally, the controller is configured to detect a startup mode of a power converter operative to convert an input voltage into an output voltage. During the startup mode, the controller: i) produces a threshold signal having a magnitude that varies over time, and ii) controls operation of switches in the power converter as a function of the threshold signal while the power converter is operated in a diode emulation mode. Implementation of the startup mode monotonically increases a magnitude of the output voltage without dips.

A power supply includes a storage component to store an output current value representative of a magnitude of output current supplied by an output voltage of a power converter to power a load. The power supply further includes an offset reference generator and a controller. The offset reference generator produces an offset reference signal, the output current value being offset by the offset reference signal. The controller controls generation of the output voltage of the power converter as a function of the offset output current value with respect to a threshold signal (value). Additionally, the controller is configured to detect a startup mode of a power converter operative to convert an input voltage into an output voltage. During the startup mode, the controller: i) produces a threshold signal having a magnitude that varies over time, and ii) controls operation of switches in the power converter as a function of the threshold signal while the power converter is operated in a diode emulation mode. Implementation of the startup mode monotonically increases a magnitude of the output voltage without dips.

A power converter having a mechanism of dynamically controlling a minimum off time is provided. A high-side overcurrent protecting circuit determines whether or not a current flows from a high-side switch through a node between a second terminal of the high-side switch and a first terminal of a low-side switch toward an inductor, and determines whether or not the current is larger than a threshold to output a high-side overcurrent detected signal and a high-side overcurrent protecting signal. An off time adjusting circuit outputs a minimum off time signal to a driver circuit according to the high-side overcurrent protecting signal. The driver circuit determines that an overcurrent event occurs when the high-side switch is turned on according to the high-side overcurrent detected signal, and accordingly the driver circuit at least continually turns on the low-side switch during a longer minimum off time of the minimum off time signal.

A power conversion unit may include two or more power modules for providing high-voltage direct current power to electrical loads, such as one or more propulsion motors aboard an aerial vehicle. Each of the power modules may be controlled by hysteresis, and may include one or more pairs of transistors that are switched by a gate driver with respect to differences between a reference current and a sensed current passing through a boost inductor. The number, size and shape of the power modules may be selected to accommodate the electrical loads, and may be switched on or off, as necessary. The power conversion unit may feature at least one more power module than is required to meet all anticipated electrical loads, thereby ensuring that the power conversion unit may continue to provide power even in the event that one of the power modules experiences a fault of any kind.

An LED driver is described, the LED driver comprising: a back end module BE comprising a switch mode power converter SMPS configured to operate in a self-oscillating current control mode, the back end module BE further comprising: an input terminal configured to receive a DC bus voltage; an output terminal configured to output a supply current for powering an LED fixture; a control unit configured to control the back end module to operate the SMPS in a voltage control mode by: determining a switching frequency of the SMPS when operating in the self-oscillating current control mode; determining a minimal switching frequency of the SMPS and receiving an input signal representative of the supply current for powering the LED fixture; wherein the control unit is further configured to control the switch of the SMPS in the voltage control mode by: operating the switch of the SMPS at a substantially constant frequency based on the determined minimal switching frequency and modulating a duty cycle of the switch to maintain the supply current at a desired current.

A system for charging a battery includes three sub-modules, each receiving a respective phase of a three-phase alternating current (AC) signal. The three sub-modules cooperate to transform the respective phases of the three-phase AC signal to a direct current (DC) signal by passing the respective phases of the three-phase AC signal through a respective semiconductor device configured to discontinuously modulate the respective phase of the three-phase AC signal to convert it to a DC signal provided to the battery to charge the battery.

A converter circuit includes first and second electronic switches coupled at an intermediate node, with an inductor coupled between the intermediate node and an output node. Switching drive control circuitry causes the first and the second electronic switch to switch between a conductive state and a non-conductive state. The drive control circuitry includes a first feedback signal path to control switching of the first and the second electronic switch as a function of the difference between a feedback signal indicative of the signal at the output node and a reference value. A second feedback signal path includes a low-pass filter coupled to the output node and configured to provide a low-pass filtered feedback signal resulting from low-pass filtering of the output signal. The second feedback signal path compensates the feedback signal as a function of the difference between the low-pass filtered feedback signal and a respective reference value.

A DC-DC converter of a synchronous rectification type includes a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor. The backflow detection circuit includes a first-stage differential input circuit including a first transistor, a first resistor, a second transistor, a second resistor and a fifth transistor, and a second-stage differential input circuit including a third transistor and a fourth transistor. The fifth transistor is of a same conductive type as the synchronous rectification transistor and contains a drain connected to the other end of the first resistor with respect to an end connected to the first transistor.