A method of manufacturing a semiconductor device including a substrate; a first nitride layer containing gallium on the substrate; and a second nitride layer containing silicon on the first nitride layer includes generating an etchant of a gas containing chlorine atoms or bromine atoms; and selectively removing the second nitride layer, wherein the etchant is generated by plasma discharge of the gas, wherein the second nitride layer and the first nitride layer are prevented from being irradiated with ultraviolet rays generated at a time of the plasma discharge, and wherein the selectively removing the second nitride layer includes etching the second nitride layer under a first atmosphere at a first pressure that is lower than a first saturated vapor pressure of a silicon compound and that is higher than a second saturated vapor pressure of a gallium compound.

An HEMT device of a normally-on type, comprising a heterostructure; a dielectric layer extending over the heterostructure; and a gate electrode extending right through the dielectric layer. The gate electrode is a stack, which includes: a protection layer, which is made of a metal nitride with stuffed grain boundaries and extends over the heterostructure, and a first metal layer, which extends over the protection layer and is completely separated from the heterostructure by said protection layer.

A process of forming a field effect transistor (FET) of a type of high electron mobility transistor (HEMT) reducing damages caused in a semiconductor layer is disclosed. The process carries out steps of: (a) depositing an insulating film on a semiconductor stack; (b) depositing a conductive film on the insulating film; (c) forming an opening in the conductive film and the insulating film by a dry-etching using ions of reactive gas to expose a surface of the semiconductor stack; and (d) forming a gate electrode to be in contact with the surface of the semiconductor stack through the opening, the gate electrode filling the opening in the conductive film and the insulating film.

A semiconductor device and a process of forming the semiconductor device are disclosed. The semiconductor device type of a high electron mobility transistor (HEMT) has double SiN films on a semiconductor layer, where the first SiN film is formed by the lower pressure chemical vapor deposition (LPCVD) technique, while, the second SiN film is deposited by the plasma assisted CVD (p-CVD) technique. Moreover, the gate electrode has an arrangement of double metals, one of which contains nickel (Ni) as a Schottky metal, while the other is free from Ni and covers the former metal. A feature of the invention is that the first metal is in contact with the semiconductor layer but apart from the second SiN film.

A semiconductor device manufacturing method includes: forming an electrode including an Ni layer and an Au layer successively stacked on a semiconductor layer; forming a Ni oxide film by performing heat treatment to the electrode at a temperature of 350° C. or more to deposit Ni at least at a part of a surface of the Au layer and to oxidize the deposited Ni; and forming an insulating film in contact with the Ni oxide film and containing Si.

A semiconductor device manufacturing method includes: forming an electrode including an Ni layer and an Au layer successively stacked on a semiconductor layer; forming a Ni oxide film by performing heat treatment to the electrode at a temperature of 350° C. or more to deposit Ni at least at a part of a surface of the Au layer and to oxidize the deposited Ni; and forming an insulating film in contact with the Ni oxide film and containing Si.

A method of fabricating transistors with short gate length by two-step photolithography is provided. This method utilizes the two-step photolithography by a stepper as well as controlling a first exposed position and a second exposed position to change the gate length.

A device including a substrate, a passivation layer, a source, a gate, a drain, and the gate including at least one step portion. Where the at least one step portion is arranged within the passivation layer, the at least one step portion includes at least one first surface and at least one second surface, where the at least one first surface is connected to the at least one second surface, where the gate includes a third surface, and where the at least one step portion is connected to the third surface. A process is also disclosed.

A semiconductor device includes a substrate, an active region and an inactive region surrounding the active region, a gate electrode, a drain electrode and a source electrode on the active region, a drain interconnection including a drain finger and a drain bar, and a source interconnection including a source finger and a source bar. The source bar is located on an opposite side of the drain bar across the active region in a first direction. The source electrode includes a first side facing the drain bar in the first direction and a first depression in a middle of the first side. A first depth of the first depression in the first direction is equal or more than a first interval between the drain bar and the first side in the first direction.

A method for manufacturing a HEMT device includes forming, on a heterostructure, a dielectric layer, forming a through opening through the dielectric layer, and forming a gate electrode in the through opening. Forming the gate electrode includes forming a sacrificial structure, depositing by evaporation a first gate metal layer layer, carrying out a lift-off of the sacrificial structure, depositing a second gate metal layer by sputtering, and depositing a third gate metal layer. The second gate metal layer layer forms a barrier against the diffusion of metal atoms towards the heterostructure.