Methods, systems, and devices for wireless communications are described. A first device (e.g., user equipment (UE), base station) may determine a condition of a channel between the first device and a second device (e.g., UE, base station). The first device may apply pre-equalization to the signal based on one or more pre-equalization parameters. The one or more pre-equalization parameters may be based on the condition of the channel. The first device may transmit, to the second device, or a third device (e.g., UE, base station), or both, a report indicating the one or more pre-equalization parameters associated with the pre-equalized signal. The first device may transmit, to the second device, the pre-equalized signal over the channel. The second device may decode the pre-equalized signal based on the report. The third device may receive the pre-equalized signal and perform interference cancelation procedures to the pre-equalized signal based on the report.

The present disclosure discloses a signal equalization apparatus. A channel length estimation circuit determines a transmission channel length of the input signal such that a processing circuit retrieves predetermined feed-forward equalizer coefficients. A feed-forward equalizer equalizes the input signal according to operation feed-forward equalizer coefficients. An auto gain circuit amplifies the input signal according to an offset signal. A signal adding circuit adds the amplified input signal and a feedback adjusting signal to generate an added input signal. A data slicer generates a data-slicing result and the offset signal according to reference thresholds based on the added input signal. A feedback equalizer equalizes the data-slicing result to generate the feedback adjusting signal according to operation feedback equalizer coefficients. The feed-forward equalizer ad the feedback equalizer keeps updating the equalizer coefficients such that a signal interference noise is eliminated rapidly to increase a signal and noise ratio of the system.

Embodiments of this application disclose an error correction method and apparatus. The method includes: obtaining an output signal and an amplitude value of a feed forward equalizer FFE, where the amplitude value is a channel response amplitude value corresponding to an equivalent channel of the FFE; performing level decision on the output signal based on the amplitude value to obtain a first decision signal, where the first decision signal includes (2M1) decision symbols, and M is an integer not less than 2; performing (1/(1+D)) decoding on the first decision signal to obtain a first decoded signal, and determining the first decoded signal as a second decision signal, where the second decision signal includes (M1) decision symbols; if an absolute value of the second decision signal is greater than (M1), determining that a burst error occurs in the second decision signal; and correcting the burst error.

Methods and systems are described for sampling a data signal using a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor, measuring an eye opening of the data signal by adjusting a decision threshold of a spare sampler operating outside of the data signal processing path to determine a center-of-eye value for the decision threshold of the spare sampler, initializing the decision threshold of the spare sampler based on the center-of-eye value and the DFE correction factor, generating respective sets of phase-error signals for the spare sampler and the data sampler responsive to a detection of a predetermined data pattern, and updating the decision threshold of the data sampler based on an accumulation of differences in phase-error signals of the respective sets of phase-error signals.

A Decision Feedback Equalizer (DFE) for filtering N symbols includes multiple processing blocks and selection logic. Each of the processing blocks includes a respective number N<N of lookahead modules. The processing blocks are arranged in groups of L processing blocks, and each processing block in a group receives (i) N symbols selected for the group from among the N symbols, and (ii) a predefined speculative value of a DFE output, and produces, based on the N symbols and on the predefined speculative value, N respective lookahead values. N1 of the N lookahead values are used in a chained calculation that meets a timing constraint that is not met by the chained calculation performed on N lookahead values. The selection logic selects one of the L lookahead values in each group of the L processing blocks for each of the N symbols, and outputs N lookahead values in parallel.

Pre-charging two or more sets of nodes to set a differential output of a multi-input summation latch connected to the two or more sets of nodes in a pre-charged state, the two or more sets of nodes comprising a set of data signal nodes and a set of DFE correction nodes, in response to a sampling clock, generating a differential data voltage and an aggregate differential DFE correction signal, and generating a data decision by driving the differential output of the multi-input summation latch into one of two possible output states according to a summation of the differential data voltage signal and the aggregate differential DFE correction signal and subsequently holding the data decision by holding the differential output of the multi-input summation latch in a latched state for a duration determined by the sampling clock.

A method to implement hybrid signal processing includes steps for receiving an analog signal at a receiver frontend, sampling the received analog signal and storing the analog sampled signals using a plurality of sampling circuitries inside the receiver frontend. Then, processing the plurality of analog sampled signals using interleaved feed-forward equalizers (FFEs) to provide FFE interleaved sampled signal values corresponding to each of the sampling circuitries. Then, processing the analog sampled signals at an interleaved Decision Feedback Equalizer (DFE) to obtain DFE interleaved sampled signal values, summing each of the FFE interleaved sampled signal values with output from one of the DFE interleaved sampled signal values to provide equalizer output signal values, and digitizing the equalizer output signal values to provide digital data bits corresponding to each of the equalizer output signal values. Implementations of the method as a hybrid communication system, system-on-a-chip, and computer readable memory are also disclosed.

Data symbols in an input signal are detected with a slicer of a DFE of a transceiver device. An output of a feedback filter of the DFE is generated, during a particular clock cycle, based on a first set of one or more data symbols detected during first one or more previous clock cycles and a second set of one or more data symbols detected during second one or more previous clock cycles. The second set is separated from the first set by a third set of one or more data symbols detected during third one or more clock cycles that occur after the first one or more clock cycles and before the second one or more clock cycles, where the output is generated without use of the third set of symbols. The output is subtracted from the input signal to generate an equalized input to the slicer.

A speculative decision feedback equalizer with split unroll multiplexers is provided. The speculative decision feedback equalizer splits an unroll multiplexer into two multiplexers. One split multiplexer provides a data path for the unroll selection signal, and the other split multiplexer provides a separate data path for the summer differential tap. In this way, the loading of an input stage of the summer circuit and the loading from the h1 unrolling loop are decoupled, allowing each split multiplexer to be configured according to a specific timing requirement along a respective data path. Thus, timing performance of the speculative decision feedback equalizer is improved.

A method facilitates determining transmission loss in a transmission signal and adjusting a receiver setting of a receiver to compensate for the transmission loss. The method includes transmitting a transmission signal from a transmitter and receiving the transmission signal by a first receiver and a second receiver. The method includes digitizing the transmission signal by the first receiver at a first sampling frequency and digitizing the transmission signal by the second receiver at a second sampling frequency that is less than or equal to the first sampling frequency. The method includes generating a PAM-n eye diagram of the transmission signal by the second receiver using digitized signals digitized by the first and second receivers and adjusting an equalizer setting of a first equalizer of the first receiver using eye-opening information of the PAM-n eye diagram where the eye-opening information includes information for the transmission loss.