The present application disclosed a decision feedback equalization processing device and method. The device comprises: a channel estimator for receiving an input signal, and determining, based on the input signal, an input signal autocorrelation matrix R.sub.yy, an input-output signal cross-correlation matrix R.sub.yx and an input-output signal cross-correlation vector r.sub.yx; a tap coefficient calculator for receiving R.sub.yy, R.sub.yx and r.sub.yx, and calculating a feed-forward equalizer (FFE) tap coefficient vector g and a feedback equalizer (FBE) tap coefficient vector f, wherein at least one of the FFE tap coefficient vector g and the FBE tap coefficient vector f is calculated using a conjugate gradient descent algorithm. The tap coefficient calculator comprises: a circulant matrix construction unit and a fast Fourier transformation (FFT) calculating unit. And the device further comprises a decision feedback equalizer for receiving from the tap coefficient calculator the FFE tap coefficient vector g and the FBE tap coefficient vector f, and performing equalization on the input signal and generating an equalized output signal.

An apparatus includes first and second receiver circuits and a decision circuit. The first receiver circuit is configured to generate a first data symbol from a particular input data symbol of a plurality of input data symbols included in an input signal. The second receiver circuit is configured to generate a second data symbol from the particular input data symbol. The decision circuit is configured to select, using respective values of one or more previous output data symbols, either the first or second data symbol as a current output data symbol. In response to a change in value between successive input data symbols, the first and second receiver circuits are configured to generate the first and second data symbols with respective data valid windows with different durations.

A transceiver system includes a transmitter circuit having a line driver with a programmable signal level to generate a transmit signal for transmission in an automotive environment over an unshielded-twisted pair (UTP) cable. The transceiver system further includes a physical layer (PHY) receiver. The PHY receiver includes a high-pass filter (HPF), an adaptive feed-forward equalizer (FFE) block and a noise aware adaptation block. The HPF rejects transient noise of a received signal, and the FFE block receives a digital signal and adaptively filters out narrowband continuous wave (CW) noise using an adaptation signal. The digital signal is based on the received signal, and the noise aware adaptation block receives an error signal and generates the adaptation signal. The error signal is generated based on an equalized signal of the FFE block and an estimated signal. The combined transmit and receive circuitry allow lowering emission while rejecting strong receiver automotive noises.

A bandwidth detection device comprises a receiving circuit, for receiving a first plurality of frequency-domain signals on a first subchannel; a filter circuit, coupled to the receiving circuit, for transferring the first plurality of frequency-domain signals to a first plurality of filtered frequency-domain signals according to a filter function; and a processing circuit, coupled to the filter circuit, for comparing the first plurality of frequency-domain signals with the first plurality of filtered frequency-domain signals, to determine whether the first subchannel comprises first transmitted data.

Methods and systems are described for sampling a data signal using a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor, measuring an eye opening of the data signal by adjusting a decision threshold of a spare sampler operating outside of the data signal processing path to determine a center-of-eye value for the decision threshold of the spare sampler, initializing the decision threshold of the spare sampler based on the center-of-eye value and the DFE correction factor, generating respective sets of phase-error signals for the spare sampler and the data sampler responsive to a detection of a predetermined data pattern, and updating the decision threshold of the data sampler based on an accumulation of differences in phase-error signals of the respective sets of phase-error signals.

A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler.

The present application disclosed a decision feedback equalization processing device and method. The device comprises: a channel estimator for receiving an input signal, and determining, based on the input signal, an input signal autocorrelation matrix R.sub.yy, an input-output signal cross-correlation matrix R.sub.yx and an input-output signal cross-correlation vector r.sub.yx; a tap coefficient calculator for receiving R.sub.yy, R.sub.yx and r.sub.yx, and calculating a feed-forward equalizer (FFE) tap coefficient vector g and a feedback equalizer (FBE) tap coefficient vector f, wherein at least one of the FFE tap coefficient vector g and the FBE tap coefficient vector f is calculated using a conjugate gradient descent algorithm. The tap coefficient calculator comprises: a circulant matrix construction unit and a fast Fourier transformation (FFT) calculating unit. And the device further comprises a decision feedback equalizer for receiving from the tap coefficient calculator the FFE tap coefficient vector g and the FBE tap coefficient vector f, and performing equalization on the input signal and generating an equalized output signal.

A transceiver system includes a transmitter circuit having a line driver with a programmable signal level to generate a transmit signal for transmission in an automotive environment over an unshielded-twisted pair (UTP) cable. The transceiver system further includes a physical layer (PHY) receiver. The PHY receiver includes a high-pass filter (HPF), an adaptive feed-forward equalizer (FFE) block and a noise aware adaptation block. The HPF rejects transient noise of a received signal, and the FFE block receives a digital signal and adaptively filters out narrowband continuous wave (CW) noise using an adaptation signal. The digital signal is based on the received signal, and the noise aware adaptation block receives an error signal and generates the adaptation signal. The error signal is generated based on an equalized signal of the FFE block and an estimated signal. The combined transmit and receive circuitry allow lowering emission while rejecting strong receiver automotive noises.

Provided is an equalizer including: an input amplifier configured to amplify and output an input signal; a first equalization circuit including a first sampling circuit, a first arithmetic circuit, and a second arithmetic circuit, the first sampling circuit being configured to generate and output 1-1 to 1-N feedback signals, wherein N is a natural number greater than or equal to 2; and a second equalization circuit including a second sampling circuit, a third arithmetic circuit, and a fourth arithmetic circuit, the second sampling circuit being configured to generate and output 2-1 to 2-M feedback signals, wherein M is a natural number greater than or equal to 2.

A decision feedback equalizer includes a summer, a slicer, and a feedback circuit. The summer is configured to receive an input signal and a correction signal from the feedback circuit and generate a summer output signal. The slicer includes a first slicer and a second slicer, both are configured to receive the summer output signal as an input, and output a slicer output signal. The feedback circuit is configured to receive the slicer output signal, and based on the slicer output signal, generate the correction signal. The input signal is received at a first clock rate. The first slicer and the second slicer sample the input signal at a second clock rate, about half the first clock rate.