A solid-state device includes a metal pattern formed on a substrate, a conductive bump connected to the metal pattern so as to be contact with a side surface of the metal pattern, and a solid-state element connected to the metal pattern via the conductive bump. A bottom surface level of at least a portion of the conductive bump is substantially equal to a bottom surface level of a portion of the metal pattern at which the metal pattern is connected to the conductive bump.

A semiconductor device includes a first semiconductor die, a second semiconductor die and a plurality of supporting structures. The first semiconductor die includes a plurality of first bumps disposed adjacent to a first active surface thereof. The second semiconductor die includes a plurality of second bumps disposed adjacent to a second active surface thereof. The second bumps are bonded to the first bumps. The supporting structures are disposed between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die. The supporting structures are electrically isolated and are disposed adjacent to a peripheral region of the second active surface of the second semiconductor die.

A semiconductor device includes a first semiconductor die, a second semiconductor die and a plurality of supporting structures. The first semiconductor die includes a plurality of first bumps disposed adjacent to a first active surface thereof. The second semiconductor die includes a plurality of second bumps disposed adjacent to a second active surface thereof. The second bumps are bonded to the first bumps. The supporting structures are disposed between the first active surface of the first semiconductor die and the second active surface of the second semiconductor die. The supporting structures are electrically isolated and are disposed adjacent to a peripheral region of the second active surface of the second semiconductor die.

A composition for use in an electronic assembly process, the composition comprising a filler dispersed in an organic medium, wherein: the organic medium comprises a polymer; the filler comprises one or more of graphene, functionalized graphene, graphene oxide, a polyhedral oligomeric silsesquioxane, graphite, a 2D material, aluminum oxide, zinc oxide, aluminum nitride, boron nitride, silver, nano fibers, carbon fibers, diamond, carbon nanotubes, silicon dioxide and metal-coated particles, and the composition comprises from 0.001 to 40 wt. % of the filler based on the total weight of the composition.

A composition for use in an electronic assembly process, the composition comprising a filler dispersed in an organic medium, wherein: the organic medium comprises a polymer; the filler comprises one or more of graphene, functionalized graphene, graphene oxide, a polyhedral oligomeric silsesquioxane, graphite, a 2D material, aluminum oxide, zinc oxide, aluminum nitride, boron nitride, silver, nano fibers, carbon fibers, diamond, carbon nanotubes, silicon dioxide and metal-coated particles, and the composition comprises from 0.001 to 40 wt. % of the filler based on the total weight of the composition.

A semiconductor package and a manufacturing method thereof are described. The semiconductor package includes a package having dies encapsulated by an encapsulant, a redistribution circuit structure, first and second modules and affixing blocks. The redistribution circuit structure is disposed on the package. The first and second modules are disposed on and respectively electrically connected to the redistribution circuit structure by first and second connectors disposed there-between. The first and second modules are adjacent to each other and disposed side by side on the redistribution circuit structure. The affixing blocks are disposed on the redistribution circuit structure and between the first and second modules and the redistribution circuit structure. The affixing blocks include first footing portions located below the first module, second footing portions located below the second module, and exposed portions exposed from the first and second modules. The affixing blocks join the first and second modules to the redistribution circuit structure.