A single crystal silicon layer is formed on a principal surface of a first wafer by epitaxial growth. A silicon oxide layer is formed on the single crystal silicon layer. Next, a defect layer is formed inside the single crystal silicon layer by ion implantation, and then, the second wafer is bonded to the silicon oxide layer on the first wafer. After that, an SOI wafer including the silicon oxide layer formed on the second wafer and the single crystal silicon layer formed on the silicon oxide layer is formed by separating the first wafer including the single crystal silicon layer from the second wafer including the single crystal silicon layer in the defect layer. Then, a photodiode is formed in the single crystal silicon layer. An interconnect layer is formed on a surface of the single crystal silicon layer which is opposite to the silicon oxide layer.

A method of manufacturing a laser diode array capable of inhibiting electric cross talk is provided. The method of manufacturing a laser diode array includes a processing step of forming a peel layer containing an oxidizable material and a vertical resonator structure over a first substrate sequentially from the first substrate side by crystal growth, and then selectively etching the peel layer and the vertical resonator structure to the first substrate, thereby processing into a columnar shape, a peeling step of oxidizing the peel layer from a side face, and then peeling the vertical resonator structure of columnar shape from the first substrate, and a rearrangement step of jointing a plurality of vertical resonator structures of columnar shape obtained by the peeling step to a surface of a metal layer of a second substrate formed with the metal layer on the surface.

A light emitting diode can include a metal support layer: a GaN-based semiconductor structure having a less than 5 microns thickness on the metal support layer, the GaN-based semiconductor structure including a p-type GaN-based semiconductor layer, an active layer on the p-type GaN-based semiconductor layer, and an n-type GaN-based semiconductor layer on the active layer; a p-type electrode on the metal support layer and including a plurality of metal layers; an n-type electrode on a flat portion of an upper surface of the GaN-based semiconductor structure, and the n-type electrode contacts the flat portion; a metal pad layer on the n-type electrode; and an insulating layer including a first part disposed on the upper surface of the GaN-based semiconductor structure, and a second part disposed on an entire side surface of the GaN-based semiconductor structure, in which the metal pad layer includes a first portion having a flat bottom surface on the n-type electrode, and a second portion having stepped surfaces.

There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.

A method of fabricating a semiconductor device includes forming a first semiconductor region at a front surface of a substrate, the first semiconductor region including an active element that regulates current flowing in a thickness direction of the substrate; grinding a rear surface of the substrate; after the grinding, performing a first etching that etches the rear surface of the substrate with a chemical solution including phosphorus; after the first etching, performing a second etching that etches the rear surface with an etching method with a lower etching rate than the first etching; and after the second etching, forming a second semiconductor region through which the current is to flow, by implanting impurities from the rear surface of the substrate.

A vertical light emitting diode structure, comprising: a support structure including a support substrate and a metallic layer, the metallic layer being disposed on the support substrate; a GaN-based semiconductor structure including a first-type semiconductor layer on the support structure, an active layer on the first-type semiconductor layer, and a second-type semiconductor layer on the active layer, the GaN-based semiconductor structure including a bottom surface proximate to the support structure, a top surface opposite to the bottom surface, and a side surface between the top surface and the bottom surface, a thickness of the GaN-based semiconductor structure from the bottom surface to the top surface being less than 5 micro meters, and a ratio of a thickness of the second-type semiconductor layer to the thickness of the GaN-based semiconductor structure being not less than 60%; a first contact layer disposed between the support structure and the GaN-based semiconductor structure to be electrically connected to the first-type semiconductor layer, a thickness of the first contact layer being less than the thickness of the first-type semiconductor layer; a second contact layer disposed on the GaN-based semiconductor structure to be electrically connected to the second-type semiconductor layer, the second contact layer including titanium and aluminum; a metal pad disposed on the second contact layer, the metal pad including gold; and a passivation layer being in contact with the support structure, the passivation layer extending from the support structure to the top surface of the GaN-based semiconductor structure via the side surface of the GaN-based semiconductor structure.

There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.

There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.

Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.