A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.

Structures, including a capacitor, and methods for forming the structures are provided. One such structure may include a first conductor a second conductor above the first conductor, and a dielectric between the first conductor and the second conductor. The dielectric does not cover a portion of the first conductor; and the second conductor does not cover the portion of the first conductor not covered by the dielectric. Other structures and methods are disclosed.

Methods and apparatus are provided for a high voltage capacitor having a plurality of capacitor units connected in electrical series in a stacked configuration. An insulator element can be positioned between two adjacent capacitor units of the high voltage capacitor for providing separation between the adjacent capacitor units, where the insulator element has a first thickness at a first end of the insulator element and a second smaller thickness at a second end of the insulator element. The insulator element can have a wedge-shaped cross section.

Methods of forming a control panel include providing an electrically conductive substrate having a front surface. A first dielectric layer is disposed on the front surface of the substrate. A first electrode layer is disposed on a front surface of the first dielectric layer, wherein the first dielectric layer electrically isolates the first electrode layer from the substrate. The first electrode layer is in electrical communication with a switch circuit adapted to detect a change in a capacitance of the first electrode layer. A substantially transparent film can be provided to cover the electrode. The front surface of the substrate is a decorative surface substantially visible through the first dielectric layer, the first electrode layer, and the film.

A sensor of volatile substances includes: a first electrode structure and a second electrode structure capacitively coupled, comb-fingered, and arranged coplanar in a plane; and a sensitive layer, of a sensitive material that is permeable to a volatile substance and has electrical permittivity depending upon a concentration of the volatile substance absorbed by the sensitive material. The sensitive layer extends from opposite sides of the plane.

In an electronic component, an outer electrode includes a sintered layer containing a sintered metal, an insulation layer containing an electric insulation material, and a Sn-containing layer containing Sn. The sintered layer extends from each of end surfaces of an element assembly onto at least one main surface thereof so as to cover each of the end surfaces of the element assembly. The insulation layer is directly provided on the sintered layer at each of the end surfaces of the element assembly so as to extend in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the sintered layer except for a portion of the sintered layer that is covered by the insulation layer, and constitutes another portion of the surface of the outer electrode.

In an electronic component, an outer electrode includes a sintered layer including a sintered metal, a reinforcement layer not containing Sn but including Cu or Ni, an insulation layer, and a Sn-containing layer. The sintered layer extends from each end surface of an element assembly onto at least one main surface thereof to cover each end surface of the element assembly. The reinforcement layer extends on the sintered layer and covers the sintered layer entirely. The insulation layer is directly provided on the reinforcement layer at each end surface of the element assembly, extends in a direction perpendicular or substantially perpendicular to a side surface of the element assembly, and defines a portion of a surface of the outer electrode. The Sn-containing layer covers the reinforcement layer except for a portion of the reinforcement layer that is covered by the insulation layer, and defines another portion of the surface of the outer electrode.

A method of assembling a capacitor assembly comprises positioning a plurality of capacitors in respective sockets formed in a non-conductive matrix by vibrating the plurality of capacitors and disposing the array of capacitors and the non-conductive matrix between a positive terminal plate and a negative terminal plate. The capacitors are electrically coupled with the positive terminal plate and the negative terminal plate and mechanically secured between the positive terminal plate and the negative terminal plate. The array of capacitors includes a void cooperating with a first opening in the positive plate and a second opening in the negative plate to form a passage. The void includes a location where at least one capacitor is omitted from the array.

A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.

Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on top and bottom sides of a monolithic structure can facilitate the formation of wrap-around plated terminations.