A back contact solar cell string includes at least two cell pieces, each cell piece including P-type doped regions and N-type doped regions that are alternately arranged, the P-type doped regions including positive electrode thin grid lines, and the N-type doped regions including negative electrode thin grid lines; and a plurality of conductive wires connected to the positive electrode thin grid lines and the negative electrode thin grid lines. The conductive regions configured for electrical connection between each conductive wire and the positive electrode thin grid lines or the negative electrode thin grid lines and insulation regions configured for insulating connection between each conductive wire and the negative electrode thin grid lines or the positive electrode thin grid lines are alternately disposed at joints between each conductive wire and the positive electrode thin grid lines, and at joints between each conductive wire and the negative electrode thin grid lines.

Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.

A solar cell, a manufacturing method therefor, and a photovoltaic module are provided. The solar cell includes a substrate having a front surface and a rear surface, a passivation stack disposed on the front surface, and a tunneling oxide layer and a doped conductive layer disposed on the rear surface. The passivation stack includes an oxygen-containing dielectric layer, a first passivation layer and a second passivation layer. The first passivation layer includes a first interface adjacent to the oxygen-containing dielectric layer and a second interface adjacent to the second passivation layer, the second passivation layer includes a third interface opposite to the second interface, a nitrogen content and a silicon content at the second interface are higher than those at the first interface and the third interface, respectively, and an oxygen content at the second interface is lower than that at the first interface and the third interface, respectively.

An apparatus for patterned processing includes a source of input gas, a source of energy suitable for generating a plasma from the input gas in a plasma region and a grounded sample holder configured for receiving a solid sample. The apparatus includes a mask arranged between the plasma region and the grounded sample holder, the mask having a first face oriented toward the plasma region and a second face oriented toward a surface of the solid sample to be processed, the mask including a mask opening extending from the first face to the second face, and an electrical power supply adapted for applying a direct-current bias voltage to the mask, and the mask opening being dimensioned and shaped so as to generate spatially selective patterned processing on the surface of the solid sample.

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

Methods, systems, and devices are disclosed for implementing high conversion efficiency solar cells. In one aspect, an optical-to-electrical energy conversion device includes a substrate formed of a doped semiconductor material and having a first region and a second region, an array of multilayered nanoscale structures protruding from the first region of the substrate, in which the nanoscale structures are formed of a first co-doped semiconductor material covered by a layer of a second co-doped semiconductor material forming a core-shell structure, the layer covering at least a portion of the doped semiconductor material of the substrate in the second region, and an electrode formed on the layer-covered portion of the substrate in the second region, in which the multilayered nanoscale structures provide an optical active region capable of absorbing photons from light at one or more wavelengths to generate an electrical signal presented at the electrode.

A hybrid-integrated series/parallel-connected photovoltaic diode array employs 10s-to-100s of single-wavelength III-V compound semiconductor photodiodes in an array bonded onto a transparent optical plate through which the array is illuminated by monochromatic light. The power-by-light system receiver enables high-voltage, up to 1000s of volts, optical transmission of power to remote electrical systems in harsh environments.

A photodetection film includes at least one lower photodiode and upper photodiode layered members. The at least one lower photodiode layered member includes lower first-type, intrinsic and second-type semiconductor layers. The at least one upper photodiode layered member is disposed on the at least one lower photodiode layered member and includes upper first-type, intrinsic and second-type semiconductor layers. The upper intrinsic semiconductor layer has an amorphous silicon structure. The lower intrinsic semiconductor layer has a structure selected from one of a microcrystalline silicon structure, a microcrystalline silicon-germanium structure, and a non-crystalline silicon-germanium structure.

A solar device includes a first string of first solar wafers, wherein a plurality of the first solar wafers each overlap with at least one vertically adjacent solar wafer from the first string. Additionally, the solar device includes a second string of second solar wafers, wherein a plurality of the second solar wafers each overlap with at least one vertically adjacent solar wafer from the second string, wherein a plurality of the first solar wafers overlap with one or more of the plurality of second solar wafers to electrically connect horizontally adjacent solar wafers in parallel.

A solar cell according to an embodiment of the present invention includes a semiconductor substrate; a first conductive type region positioned at or on the semiconductor substrate; and a first electrode electrically connected to the first conductive type region. The first electrode includes a plurality of first finger lines formed in a first direction and parallel to each other; and a plurality of first bus bars including a plurality of first pad portions positioned in a second direction intersecting with the first direction. The plurality of first finger lines include a contact portion which is in direct contact with the first conductive type region. The plurality of first pad portions have a different material, a composition, or a multi-layered structure that is different from that of the plurality of first finger lines, and are spaced apart from the first conductive type region.