Y10T428/219

Devices for methodologies related to wafer carriers

Disclosed are systems, devices and methodologies for handling wafers in wafer processing operations through use of wafer carriers. In an example situation, a wafer carrier can be configured as a plate to allow bonding of a wafer thereto to provide support for the wafer during some processing operations. Upon completion of such operations, the processed wafer can be separated from the support plate so as to allow further processing. Various devices and methodologies related to such wafer carriers for efficient handling of wafers are disclosed.

PVD target for self-centering process shield

In some embodiments, a target assembly, for use in a substrate processing chamber having a process shield, may include a backing plate having a first side and an opposing second side, wherein the second side comprises a first surface having a first diameter bounded by a first edge; a target material having a first side bonded to the first surface of the backing plate; wherein the first edge is an interface between the backing plate and the target material; a plurality of slots disposed along an outer periphery of the backing plate extending from the first side of the backing plate toward the second side of the backing plate, wherein the plurality of slots are configured to align the target assembly with respect to the process shield.

Chamfered silicon carbide substrate and method of chamfering

The present invention relates to a chamfered silicon carbide substrate which is essentially monocrystalline, and to a corresponding method of chamfering a silicon carbide substrate. A silicon carbide substrate according to the invention comprises a main surface (102), wherein an orientation of said main surface (102) is such that a normal vector ({right arrow over (O)}) of the main surface (102) includes a tilt angle with a normal vector ({right arrow over (N)}) of a basal lattice plane (106) of the substrate, and a chamfered peripheral region (110), wherein a surface of the chamfered peripheral region includes a bevel angle with said main surface, wherein said bevel angle is chosen so that, in more than 75% of the peripheral region, normal vectors ({right arrow over (F)}_i) of the chamfered peripheral region (110) differ from the normal vector of the basal lattice plane by less than a difference between the normal vector of the main surface and the normal vector of the basal lattice plane of the substrate.