A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

A process for obtaining a bonding surface for direct bonding includes: a) providing a substrate based on a sintered metal having a base surface with an RMS roughness lower than 6 nanometers and a PV roughness lower than 100 nanometers; b) bombarding the base surface with ionic species; c) depositing a metal layer on the base surface; and d) carrying out a mechanical and/or chemical polish of an exposed surface of the metal layer. A structure including a substrate based on a sintered metal the base surface of which is at least partially formed from a metal including ionic species implanted by bombardment of the base surface, and a metal layer of identical chemical composition to that of the metal base substrate and including a bonding surface with an RMS roughness lower than 0.6 nanometers and a PV roughness lower than 10 nanometers is also provided.

The present invention relates to a silicide alloy film that is formed on a substrate containing Si, the silicide alloy film including a metal M1 having a work function of 4.6 eV or more and 5.7 eV or less, a metal M2 having a work function of 2.5 eV or less and 4.0 eV or more, and Si, the silicide alloy film having a work function of 4.3 eV or more and 4.9 eV or less. Here, the metal M1 is preferably Pt, Pd, Mo, Ir, W or Ru, and the metal M2 is preferably Hf, La, Er, Ho, Er, Eu, Pr or Sm. The silicide alloy film according to the present invention is a thin-film which has excellent heat-resistance and favorable electrical property.

Embodiments of the invention generally provide a process kit for use in a physical deposition chamber (PVD) chamber. In one embodiment, the process kit provides adjustable process spacing, centering between the cover ring and the shield, and controlled gas flow between the cover ring and the shield contributing to uniform gas distribution, which promotes greater process uniformity and repeatability along with longer chamber component service life.

An engineered substrate includes a support structure comprising a polycrystalline ceramic core, an adhesion layer coupled to the polycrystalline ceramic core, and a barrier layer coupled to the adhesion layer. The engineered substrate also includes an bonding layer coupled to the support structure, a substantially single crystal layer coupled to the bonding layer, and an epitaxial gallium nitride layer coupled to the substantially single crystal layer.

A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

A process of preparing a plurality of nanostructures, each being composed of at least one target material is disclosed. The process comprises sequentially electrodepositing a first material and the at least one target material into pores of a porous membrane having a nanometric pore diameter, to thereby obtain within the pores nanometric rods, each of the nanometric rods having a plurality of segments where any two adjacent segments are made of different materials. The process further comprises and etching the membrane and the first material, thereby obtaining the nanostructures.

Embodiments of the invention generally provide a process kit for use in a physical deposition chamber (PVD) chamber. In one embodiment, the process kit provides adjustable process spacing, centering between the cover ring and the shield, and controlled gas flow between the cover ring and the shield contributing to uniform gas distribution, which promotes greater process uniformity and repeatability along with longer chamber component service life.