Patent classifications
B41N2210/04
Blanket for transferring a paste image from an engraved plate to a substrate
A blanket for transferring a paste image from an engraved plate to a substrate is provided. The blanket includes a foam; a supporting layer on the foam; and a paste transfer layer on the supporting layer. The paste transfer layer is an inter-penetrating polymer network of silicone rubber and fluoroelastomer.
Method and blanket for transferring a paste image from engraved plate to substrate
A blanket for transferring a paste image from an engraved plate to a substrate is provided. The blanket includes a foam, a PET layer on the foam, and a paste transfer layer on the PET layer. The foam has a Shore A hardness of 20 to 80 and a thickness of 0.5 mm to 1.5 mm, wherein the foam has a higher Shore A hardness corresponding to a greater thickness.
FILMS AND ARTICLES MADE WITH THERMOPLASTIC BLOCK COPOLYMERS
The present invention relates to printing blankets, pipe liners, conveyor belts, inflatable articles, collapsible containers, protective clothing, and other types of coated fabrics that are manufactured with a thermoplastic block copolymer (TBC). This TBC can be a thermoplastic polyurethane (TPU), a copolyester (COPE), a copolyamide (COPA) or a polyurethaneurea (TPUU). The subject invention more specifically discloses a printing blanket or printing sleeve and a cured in place liner for a passageway or pipe. The TBC is (I) the reaction product of (1) a hydrophobic polyol or polyamine, (2) a polyisocyanate or an aromatic dicarboxylic acid, and (3) a linear chain extender containing 2 to 20 carbon atoms, or (II) the reaction product of (1) a hydrophobic polyol or polyamine, and (2) a carboxyl terminated telechelic polyamide sequence.
Nanowire transistor fabrication with hardmask layers
A nanowire device of the present description may be produced with the incorporation of at least one hardmask during the fabrication of at least one nanowire transistor in order to assist in protecting an uppermost channel nanowire from damage that may result from fabrication processes, such as those used in a replacement metal gate process and/or the nanowire release process. The use of at least one hardmask may result in a substantially damage free uppermost channel nanowire in a multi-stacked nanowire transistor, which may improve the uniformity of the channel nanowires and the reliability of the overall multi-stacked nanowire transistor.