Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.

A sensor unit includes a transducer element monitoring a measurand and generating an electrical output signal correlated with the measurand, a sensor substrate having a first surface and an opposite second surface, a recess extending from the first surface of the substrate through to the second surface of the substrate, and a circuit carrier. The transducer element and a first electrically conductive contact pad are arranged on the first surface and electrically connected. The circuit carrier has a second electrically conductive contact pad. The sensor substrate is mounted on the circuit carrier with the first surface facing the circuit carrier. The first electrically conductive contact pad and the second electrically conductive contact pad are interconnected by an electrically conductive material filled in from the second surface towards the first surface of the sensor substrate.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

An integrated circuit device that comprises a single semiconductor substrate, a device layer formed on a frontside of the single semiconductor substrate, a redistribution layer formed on a backside of the single semiconductor substrate, a through silicon via (TSV) formed within the single semiconductor substrate that is electrically coupled to the device layer and to the redistribution layer, a logic-memory interface (LMI) formed on a backside of the single semiconductor substrate that is electrically coupled to the redistribution layer, and a MEMS device formed on the backside of the single semiconductor substrate that is electrically coupled to the redistribution layer.

Microelectromechanical systems (MEMS) packages and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a MEMS package may include attaching a MEMS structure having a capping structure thereon to a device wafer comprising a plurality of first devices formed therein to form a wafer level MEMS package; and singulating the device wafer having the MEMS structure attached thereto to form a plurality of chip scale MEMS packages.

A device including an electrically conducting track arranged on a support includes a step of supply of the support, and a step of formation of the electrically conducting track on the support including a step of supply of a solution intended to be deposited on the support, a step of deposition of the solution by printing on the support. The step of supply of the solution is such that the solution supplied includes a mixture of a solvent, of a set of metal particles and of a metallic material having a melting point below that of the metal particles of the set of metal particles, and the method includes a step of melting of the metallic material which results in the formation of a solder of metallic material between metal particles of the set of metal particles.

A method of manufacturing a panel transducer scale package includes securing acoustic components at predetermined locations on a first carrier substrate with a first surface of the acoustic components positioned adjacent to the first carrier substrate. ASIC components are also secured at predetermined locations on the first carrier substrate with a first surface of the ASIC components positioned adjacent to the first carrier substrate. Photoresist resin is applied over the acoustic components and the ASIC components such that a second surface of the acoustic components is left exposed from the photoresist resin. The first carrier substrate is removed to expose the first surface of the acoustic components and the first surface of the ASIC components. A buildup layer is formed including electrical pathways between each of the acoustic components and the ASIC components, and the photoresist resin is removed.

Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

A microelectromechanical system (MEMS) device may include a MEMS structure above a first substrate. The MEMS structure comprising a central static element, a movable element, and an outer static element. A portion of bonding material between the central static element and the first substrate. A second substrate above the MEMS structure, with a portion of a dielectric layer between the central static element and the second substrate. A supporting post comprises the portion of bonding material, the central static element, and the portion of dielectric material.