Microelectromechanical systems (MEMS) packages and methods of manufacture thereof are described. In an embodiment, a method of manufacturing a MEMS package may include attaching a MEMS structure having a capping structure thereon to a device wafer comprising a plurality of first devices formed therein to form a wafer level MEMS package; and singulating the device wafer having the MEMS structure attached thereto to form a plurality of chip scale MEMS packages.

Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

A microphone assembly includes a substrate and a microelectromechanical systems (MEMS) die. The substrate comprises a top layer and a bottom layer. The top layer comprises a layer of solder mask material spanning across at least a portion of the substrate and one or more standoffs formed of the solder mask material. The one or more standoffs and the layer of solder mask material comprising a single, contiguous structure. The MEMS die is disposed on the one or more standoffs and is coupled to the substrate via a bonding material. The bonding material forms an acoustic seal between the substrate and the MEMS die.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

A semiconductor device, which comprises: a silicon substrate having a front surface and a back surface; a metal layer located on said front surface; a through silicon via (TSV) extending through said silicon substrate from said back surface to said front surface, wherein said TSV is connected at one end to said metal layer; and a redistribution layer (RDL), wherein said RDL is embedded in said silicon substrate.

An ultrasound transducer device includes an electrode, a membrane, and vias. The membrane is separated from the electrode by a cavity between the membrane and the electrode. The vias electrically connect the electrode to a substrate disposed on an opposite side of the electrode from a side facing the membrane. The vias are disposed in the ultrasound transducer device such that greater than 50% of the vias overlap with the cavity in a plan view.

Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The method includes bonding a MEMS substrate to a carrier substrate. The epitaxial layer is formed over the MEMS substrate, where the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts is formed over the epitaxial layer.

An ultrasound transducer device includes an electrode, a membrane, and vias. The membrane is separated from the electrode by a cavity between the membrane and the electrode. The vias electrically connect the electrode to a substrate disposed on an opposite side of the electrode from a side facing the membrane. The vias are disposed in the ultrasound transducer device such that greater than 50% of the vias overlap with the cavity in a plan view.

Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) device. The method includes forming a filter stack over a carrier substrate. The filter stack comprises a particle filter layer having a particle filter. A support structure layer is formed over the filter stack. The support structure layer is patterned to define a support structure in the support structure layer such that the support structure has one or more segments. The support structure is bonded to a MEMS structure.