B81B2207/07

MEMS microphone
09807517 · 2017-10-31 · ·

The MEMS microphone includes a first circuit board; a second circuit board keeping a distance from the first circuit board; a frame located between the first circuit board and the second circuit board for forming a cavity cooperatively with the first circuit board and the second circuit board, the frame including a plated-through-hole; an ASIC chip located in the cavity; and an MEMS chip having a back cavity. The first circuit board is electrically connected with the second circuit board by the plated-through-hole. The frame includes a conductive layer and an insulating layer, and the conductive layer is located between an inner surface of the frame and the insulating layer.

SENSOR DEVICE

A sensor device includes a sensor element, a substrate, and a bonding wire. Over the substrate, provided is the sensor element. The bonding wire forms at least part of a connection path that electrically connects the sensor element and the substrate together. The bonding wire is provided to connect two connection surfaces that intersect with each other.

SCANNING MIRROR DEVICE AND A METHOD FOR MANUFACTURING IT
20170297898 · 2017-10-19 ·

An optical device formed of a mirror wafer, a cap wafer, and a glass wafer. The mirror wafer includes a first layer of electrically conductive material, a second layer of electrically conductive material, and a third layer of electrically insulating material between the first layer and the second layer. A mirror element is formed of the second layer of the mirror wafer, and has a reflective surface in the bottom of a cavity opened into at least the first layer. A good optical quality planar glass wafer can be used to enclose the mirror element when the mirror wafer, cap wafer, and glass wafer are bonded to each other.

Semiconductor manufacturing method and structure thereof

A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

A semiconductor structure includes a first substrate including a cavity extended into the first substrate, a device disposed within the cavity, a first dielectric layer disposed over the first substrate and a first conductive structure surrounded by the first dielectric layer, and a second substrate including a second dielectric layer disposed over the second substrate and a second conductive structure surrounded by the second dielectric layer, wherein the first conductive structure is bonded with the second conductive structure and the first dielectric layer is bonded with the second dielectric layer to seal the cavity.

Absolute and differential pressure sensors and related methods

Implementations of absolute pressure sensor devices may include a microelectromechanical system (MEMS) absolute pressure sensor coupled over a controller die. The MEMS absolute pressure sensor may be mechanically coupled to the controller die and may also be configured to electrically couple with the controller die. A perimeter of the controller die may be one of the same size and larger than a perimeter of the MEMS absolute pressure sensor. The controller die may be configured to electrically couple with a module through an electrical connector.

GETTER ELECTRODE TO IMPROVE VACUUM LEVEL IN A MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICE
20170297904 · 2017-10-19 ·

A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.

Integrated digital force sensors and related methods of manufacture

In one embodiment, a ruggedized wafer level microelectromechanical (“MEMS”) force sensor includes a base and a cap. The MEMS force sensor includes a flexible membrane and a sensing element. The sensing element is electrically connected to integrated complementary metal-oxide-semiconductor (“CMOS”) circuitry provided on the same substrate as the sensing element. The CMOS circuitry can be configured to amplify, digitize, calibrate, store, and/or communicate force values through electrical terminals to external circuitry.

CMOS and pressure sensor integrated on a chip and fabrication method
09790082 · 2017-10-17 · ·

A device comprises a silicon-on-insulator (SOI) substrate having first and second silicon layers with an insulator layer interposed between them. A structural layer, having a first conductivity type, is formed on the first silicon layer. A well region, having a second conductivity type opposite from the first conductivity type, is formed in the structural layer, and resistors are diffused in the well region. A metallization structure is formed over the well region and the resistors. A first cavity extends through the metallization structure overlying the well region and a second cavity extends through the second silicon layer, with the second cavity stopping at one of the first silicon layer and the insulator layer. The well region interposed between the first and second cavities defines a diaphragm of a pressure sensor. An integrated circuit and the pressure sensor can be fabricated concurrently on the SOI substrate using a CMOS fabrication process.

Actively preventing charge induced leakage of semiconductor devices

A structure for preventing charge induced leakage of a semiconductor device includes a shield separated from a first interconnect by at least a first lateral spacing and separated from a second interconnect by at least a second lateral spacing. The first interconnect is connected to a first junction and the second interconnect is connected to a second junction. A shield bias is connected to the shield to terminate an electromagnetic field on the shield. The shield between the first and second lateral spacings has a minimum width to substantially prevent formation of a conductive channel between the first and second junctions. The shield may be formed over a portion of the first junction and over a portion of the second junction to substantially prevent formation of another conductive channel between the first and second junctions at a location that does not have the first and second lateral spacings.