A micro-electro-mechanical system (MEMS) package structure and a method for fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (200) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) and an input-output connecting member (420) are formed on a first bonding surface (100a) of the device wafer (100). The MEMS die (200) is coupled to the first bonding surface (100a) through a bonding layer (500). The MEMS die (200) includes a closed micro-cavity (220) and a second contact pad (220). The first contact pad (410) is electrically connected to a corresponding second contact pad (220). An opening (510) that exposes the input-output connecting member (420) is formed in the bonding layer (500). The MEMS package structure allows electrical interconnection between the MEMS die (200) and the device wafer (100) with a reduced package size, compared to those produced by existing integration techniques. In addition, function integration ability of the package structure is improved by integrating a plurality of MEMS dies of the same or different structures and functions on the same device wafer.

A microsystem and/or nanosystem type device is disclosed, comprising: a first substrate, or intermediate substrate, comprising a mobile part, a second substrate or support substrate, at least one lower electrode, and one dielectric layer (101) located between the first and second substrates, the dielectric layer being arranged between the lower electrode and the first substrate; the first substrate comprising through vias filled with conducting material in contact with said lower electrode.

Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an adhesive layer on the top side of the structure. Aspects also include depositing a release layer and a glass layer on the top side of the structure. Aspects also include reducing a thickness of the silicon substrate on the bottom side of the structure.

A configuration for a capacitive pressure sensor uses a silicon on insulator wafer to create an electrically isolated sensing node across a gap from a pressure sensing wafer. The electrical isolation, small area of the gap, and silicon material throughout the capacitive pressure sensor allow for minimal parasitic capacitance and avoid problems associated with thermal mismatch.

A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

A base plate with a first side having an elevated portion, a recessed portion laterally surrounding the elevated portion, and a vertical face extending from the recessed portion to the elevated portion is provided. At least a part of the vertical face is covered with a metal layer. A mold compound structure is formed on the first side with the metal layer disposed between the first side and the mold compound structure such that the mold compound structure includes an elevated portion laterally surrounding a recessed portion, and opposing edge faces that vertically extend from the recessed portion to the elevated portion. At least a part of the base plate is subsequently removed such that the recessed portion of the mold compound structure is uncovered from the base plate and such that the metal layer remains on at least one uncovered section of the mold compound structure.

A semiconductor pressure sensor assembly for measuring a pressure of an exhaust gas which contains corrosive components, comprising: a first cavity, a pressure sensor comprising first bondpads for electrical interconnection, a CMOS chip comprising second bondpads for electrical interconnection with the pressure sensor, an interconnection module having electrically conductive paths connected via bonding wires to the pressure sensor and to the CMOS chip; the interconnection module being a substrate with corrosion-resistant metal tracks, wherein the CMOS chip and part of the interconnection module are encapsulated by a plastic package.

A semiconductor device composed of a capacitive humidity sensor comprised of a moisture-sensitive polymer layer electrografted to an electrically conductive metal layer situated on an CMOS substrate or a combined MEMS and CMOS substrate, and exposed within an opening through a passivation layer, packages composed of the encapsulated device, and methods of forming the capacitive humidity sensor within the semiconductor device, are provided.

The application relates to integrated MEMS transducers comprising a MEMS transducer structure formed of a plurality of transducer layers and at least one circuit component formed from a plurality of circuitry (CMOS) layers. The integrated MEMS transducer further comprises a conductive enclosure that is integral to the transducer layers and circuitry layers. The at least one circuit component is inside the conductive enclosure whilst the MEMS transducer structure is outside the enclosure.

Embodiments of the application provide a MEMS chip and an electrical packaging method for a MEMS chip. The MEMS chip includes a MEMS device layer, a first isolating layer located under the MEMS device layer, and a first conducting layer located under the first isolating layer. At the first isolating layer, there are a corresponding quantity of first conductive through holes in locations corresponding to conductive structures in a first region and in locations corresponding to electrodes in a second region. At the first conducting layer, there are M electrodes spaced apart from one another, and the M electrodes are respectively connected to M of the first conductive through holes. At the first conducting layer, electrodes in locations corresponding to at least some of the conductive structures in the first region are electrically connected in a one-to-one correspondence to electrodes in locations corresponding to at least some of the electrodes in the second region.