An adjustment method of a laser processing apparatus includes a spatial light modulator adjustment step of adjusting a spatial light modulator into a state ready for splitting a laser beam emitted from a laser oscillator and applying a plurality of laser beams such that laser beams will have a desired positional relation, a processing mark formation step of operating the laser oscillator to apply the laser beams to a wafer such that a plurality of processing marks is formed, an imaging step of stopping the laser oscillator, and imaging the processing marks formed at the wafer, and an aberration correction step of correcting aberration of the condenser by comparing the desired positional relation and a positional relation among the imaged processing marks, and adjusting the spatial light modulator such that the positional relation among the processing marks conforms to the desired positional relation.

Provided a semiconductor chip bonding apparatus including a body, a heater disposed on a lower surface of the body, a collet disposed on a lower surface of the heater, and a head disposed on a lower surface of the collet, the head has a rectangular plate shape, a lower surface and side surfaces of the head are exposed, an upper surface of the head is in contact with the lower surface of the collet, an area of the upper surface of the head is smaller than an area of the lower surface of the collet, the head includes a central section including a recess, and an outer surface constituting a part of the side surfaces of the head, and a peripheral section connected to the recess and disposed on each corners of the head, and a thermal conductivity of the peripheral section is different from that of the central section.

A wafer processing method includes a polyolefin sheet providing step of positioning a wafer in an inside opening of a ring frame and providing a polyolefin sheet on a back side or a front side of the wafer and on a back side of the ring frame, a uniting step of heating the polyolefin sheet as applying a pressure to the polyolefin sheet to thereby unite the wafer and the ring frame through the polyolefin sheet by thermocompression bonding, a dividing step of applying a laser beam to the wafer to form shield tunnels in the wafer, thereby dividing the wafer into individual device chips, and a pickup step of heating the polyolefin sheet, pushing up each device chip through the polyolefin sheet, and picking up each device chip from the polyolefin sheet.

A processing method of a wafer in which a modified layer is formed inside the wafer. In the processing method, irradiation with a first laser beam is executed from a back surface side of the wafer and the modified layer is formed inside the wafer. Then, irradiation with a second laser beam is executed with the focal point thereof positioned to the inside or the front surface of the wafer and reflected light is imaged by an imaging unit. Furthermore, a processing state of the wafer is determined on the basis of a taken image. The second laser beam is shaped in such a manner that a sectional shape thereof in a surface perpendicular to a traveling direction thereof becomes asymmetric across the modified layer.

A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.

A method of soldering elements together includes providing a substrate having a metal die attach surface, providing a semiconductor die that is configured as a power semiconductor device and having a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack having a front side metallization and a contaminant protection layer, arranging the semiconductor die on the substrate with a region of solder material between the die attach surface and the rear side metallization, and performing a soldering process that reflows the region of solder material to form a soldered joint between the metal die attach surface and the rear side metallization, wherein the soldering process comprises applying mechanical pressure to the front side metallization.

A flux composition includes an aromatic resin including one benzene ring and one or two hydroxyl (—OH) groups, an activator selected from a group consisting of a dicarboxylic acid and a dicarboxylic anhydride, and a solvent.

The present invention relates to a chamfered silicon carbide substrate which is essentially monocrystalline, and to a corresponding method of chamfering a silicon carbide substrate. A silicon carbide substrate according to the invention comprises a main surface (102), wherein an orientation of said main surface (102) is such that a normal vector ({right arrow over (O)}) of the main surface (102) includes a tilt angle with a normal vector ({right arrow over (N)}) of a basal lattice plane (106) of the substrate, and a chamfered peripheral region (110), wherein a surface of the chamfered peripheral region includes a bevel angle with said main surface, wherein said bevel angle is chosen so that, in more than 75% of the peripheral region, normal vectors ({right arrow over (F)}_i) of the chamfered peripheral region (110) differ from the normal vector of the basal lattice plane by less than a difference between the normal vector of the main surface and the normal vector of the basal lattice plane of the substrate.

A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

A component for use inside a semiconductor chamber with a laser textured surface facing a vacuum region inside the semiconductor chamber is provided.