There is provided a liquid discharge head including: a nozzle member; a first common channel member including first common channels; an actuator member including pressure chambers and driving elements; a driver IC; a second common channel member including a second common channel; and a chiller configured to chill the driver IC.

An element substrate of multi-layer structure, comprising an electrothermal transducing element formed in a first layer, a protective film covering the electrothermal transducing element, an anti-cavitation film formed on the protective film, a first electrical wire formed in the same layer as the anti-cavitation film, arranged to be separated from the electrothermal transducing element, and electrically connected to at least one end of the electrothermal transducing element, a second electrical wire on an opposite side, in relation to the electrothermal transducing element, to the protective film, and formed in a second layer, and a first connection member that extends between the first and second layers, and that electrically connects the first and second electrical wires.

An liquid ejecting apparatus includes a drive signal output circuit, a control signal output circuit, a differential signal output circuit, a residual vibration signal input circuit, and a head unit, in which the head unit includes an integrated circuit and an ejector, and the integrated circuit includes a drive signal input terminal that inputs a first drive signal, a residual vibration signal output terminal that outputs a residual vibration signal, a differential signal receiving circuit that converts a pair of differential signals into a control signal and outputs the control signal, a drive signal selection circuit that outputs a second drive signal based on the control signal and the first drive signal, a drive signal output terminal that outputs the second drive signal to the ejector, and a residual vibration signal output circuit that outputs a residual vibration signal based on the residual vibration generated by driving the piezoelectric element.

A wafer structure is disclosed and includes a chip substrate and plural inkjet chips having plural ink-drip generators. Each ink-drop generator includes a thermal-barrier layer, a resistance heating layer and a protective layer. The thermal-barrier layer is formed on the chip substrate, the resistance heating layer is formed on the thermal-barrier layer, a part of the protective layer is formed on the resistance heating layer, and the barrier layer is formed on the protective layer. The ink-supply chamber has a bottom in communication with the protective layer, and a top in communication with the nozzle. The thermal-barrier layer has a thickness of 500˜5000 angstroms, the protective layer has a thickness of 150˜3500 angstroms, the resistance heating layer has a thickness of 100˜500 angstroms, the resistance heating layer has a length of 5˜30 microns, and the resistance heating layer has a width of 5˜10 microns.

A wafer structure including a chip substrate and plural inkjet chips is disclosed. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of at least 12 inches. The inkjet chips are formed on the chip substrate by the semiconductor process and diced into the first inkjet chip and the second inkjet chip. Each of the first inkjet chip and the second inkjet chip includes plural ink-drop generators. Each of the ink-drop generators includes a nozzle. A diameter of the nozzle is in a range between 0.5 micrometers and 10 micrometers. A volume of an inkjet drop discharged from the nozzle is in a range between 1 femtoliter and 3 picoliters. The ink-drop generators form plural longitudinal axis array groups having a pitch and form plural horizontal axis array groups having a central stepped pitch equal to 1/600 inches or less.

A wafer structure is disclosed and includes a chip substrate and at least one inkjet chip having plural ink-drip generators. Each ink-drop generator includes a thermal-barrier layer, a resistance heating layer and a protective layer. The thermal-barrier layer is formed on the chip substrate, the resistance heating layer is formed on the thermal-barrier layer, a part of the protective layer is formed on the resistance heating layer, and the barrier layer is formed on the protective layer. The ink-supply chamber has a bottom in communication with the protective layer, and a top in communication with the nozzle. The thermal-barrier layer has a thickness of 500˜5000 angstroms, the protective layer has a thickness of 150˜3500 angstroms, the resistance heating layer has a thickness of 100˜500 angstroms, the resistance heating layer has a length of 5˜30 microns, and the resistance heating layer has a width of 5˜10 microns.

To suppress the progress of metal dissolution by ink when wire break of a wiring to a heater occurs, in an element substrate, according to the present invention, for example, which is used in an inkjet printhead, each of heaters integrated in the element substrate is connected to an individual wiring via a first through-hole penetrating an insulation layer, and further connected to a common wiring from the individual wiring via a wiring formed in another wiring layer via a second through-hole penetrating an insulation layer. The individual wiring and the common wiring are formed in the same wiring layer, and an aspect ratio of the second through-hole is lower than an aspect ratio of the first through-hole.

A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.

A wafer structure including a chip substrate and plural inkjet chips is disclosed. The chip substrate is a silicon substrate fabricated by a semiconductor process on a wafer of at least 12 inches. The inkjet chips are formed on the chip substrate by the semiconductor process and diced into the first inkjet chip and the second inkjet chip. Each of the first inkjet chip and the second inkjet chip includes plural ink-drop generators. Each of the ink-drop generators includes a nozzle. A diameter of the nozzle is in a range between 0.5 micrometers and 10 micrometers. A volume of an inkjet drop discharged from the nozzle is in a range between 1 femtoliter and 3 picoliters. The ink-drop generators form plural longitudinal axis array groups having a pitch and form plural horizontal axis array groups having a central stepped pitch equal to 1/600 inches or less.

A liquid ejection head circuit board including a substrate, a heat generating resistance element that generates heat energy used for ejection of liquid, an electric wiring layer that is electrically connected to the heat generating resistance element, and an insulating film that insulates the electric wiring layer. The insulating film includes a first insulating film and a second insulating film on the first insulating film, the first insulating film is a first SiOCN film, and the second insulating film is a second SiOCN film containing more carbon than the first SiOCN film or a low-density insulating film with a lower density than the first SiOCN film.