H10D62/137

METHOD OF MAKING BIPOLAR TRANSISTOR

A method of making a bipolar transistor includes patterning a first photoresist over a collector region of the bipolar transistor, the first photoresist defining a first opening. The method further includes performing a first implantation process through the first opening. The method further includes patterning a second photoresist over the collector region, the second photoresist defining a second opening different from the first opening. The method further includes performing a second implantation process through the second opening, wherein a dopant concentration resulting from the second implantation process is different from a dopant concentration resulting from the first implantation process.

SUPERLATTICE LATERAL BIPOLAR JUNCTION TRANSISTOR

A bipolar junction transistor includes an intrinsic base formed on a substrate. The intrinsic base includes a superlattice stack including a plurality of alternating layers of semiconductor material. A collector and emitter are formed adjacent to the intrinsic base on opposite sides of the base. An extrinsic base structure is formed on the intrinsic base.

SUPERLATTICE LATERAL BIPOLAR JUNCTION TRANSISTOR

A bipolar junction transistor includes an intrinsic base formed on a substrate. The intrinsic base includes a superlattice stack including a plurality of alternating layers of semiconductor material. A collector and emitter are formed adjacent to the intrinsic base on opposite sides of the base. An extrinsic base structure is formed on the intrinsic base.

Memory Cell Comprising First and Second Transistors and Methods of Operating
20170229466 · 2017-08-10 ·

Semiconductor memory cells, array and methods of operating are disclosed. In one instance, a memory cell includes a bi-stable floating body transistor and an access device; wherein the bi-stable floating body transistor and the access device are electrically connected in series.

ULTRA-SENSITIVE BIOSENSOR BASED ON LATERAL BIPOLAR JUNCTION TRANSISTOR HAVING SELF-ALIGNED EPITAXIALLY GROWN BASE
20170227485 · 2017-08-10 ·

An exemplary biosensor sensor for detecting the presence of a biological material includes an SOI substrate, a BJT formed on at least a portion of the substrate, and a sensing structure formed on at least a portion of an upper surface of the BJT. The BJT includes an emitter region, a collector region and a self-aligned epitaxially grown intrinsic base region laterally adjacent to the emitter and collector regions. The sensing structure includes an opening, centered above and exposing the intrinsic base region, and at least one dielectric layer formed in the opening and contacting at least a portion of the intrinsic base region. The dielectric layer is configured to respond to charges in biological molecules.

Ultra-sensitive biosensor based on lateral bipolar junction transistor having self-aligned epitaxially grown base

An exemplary biosensor sensor for detecting the presence of a biological material includes an SOI substrate, a BJT formed on at least a portion of the substrate, and a sensing structure formed on at least a portion of an upper surface of the BJT. The BJT includes an emitter region, a collector region and a self-aligned epitaxially grown intrinsic base region laterally adjacent to the emitter and collector regions. The sensing structure includes an opening, centered above and exposing the intrinsic base region, and at least one dielectric layer formed in the opening and contacting at least a portion of the intrinsic base region. The dielectric layer is configured to respond to charges in biological molecules.

Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor
20170221900 · 2017-08-03 ·

Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to offset charge leakage out of a floating body of the cell, wherein a charge level of the floating body indicates a state of the memory cell; and accessing the cell.

Bipolar transistor having collector with doping spike

This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be disposed relatively near an interface between the collector and the base. For instance, the doping spike can be disposed within half of the thickness of the collector from the interface between the collector and the base. Such bipolar transistors can be implemented, for example, in power amplifiers.

Bipolar junction transistors with a buried dielectric region in the active device region

Device structure and fabrication methods for a bipolar junction transistor. A trench isolation region is formed that bounds an active device region along a sidewall. A dielectric region is formed that extends laterally from the sidewall of the active device region into the active device region. The dielectric region is located beneath a top surface of the active device region such that a section of the active device region is located between the top surface and the dielectric region.

Latch-up free power transistor
09722059 · 2017-08-01 · ·

There are disclosed herein various implementations of a latch-up free power transistor. Such a device includes an insulated gate situated adjacent to a conduction channel in the power transistor, an emitter electrode in direct physical contact with the conduction channel, and a collector electrode in electrical contact with the conduction channel. The power transistor also includes an emitter layer in contact with a surface of a semiconductor substrate adjacent the conduction channel.