Patent classifications
H10H20/82
Nitride semiconductor element and method for manufacturing the same
A method of manufacturing a nitride semiconductor element includes dry etching a main surface of a sapphire substrate at a c-plane side thereof, using a mask provided on the main surface, to form a plurality of projections, each having a circular bottom surface; wet etching the sapphire substrate to form an upper part of each projection into a triangular pyramid shape while maintaining the circular bottom surface of the projection; and growing a semiconductor layer made of a nitride semiconductor on a dry etched surface and a wet etched surface of the sapphire substrate.
METHOD FOR OBTAINING PATTERNS IN A LAYER
The invention relates in particular to a method for producing subsequent patterns in an underlying layer (120), the method comprising at least one step of producing prior patterns in a carbon imprintable layer (110) on top of the underlying layer (120), the production of the prior patterns involving nanoimprinting of the imprintable layer (110) and leave in place a continuous layer formed by the imprintable layer (110) and covering the underlying layer (120), characterized in that it comprises the following step: at least one step of modifying the underlying layer (120) via ion implantation (421) in the underlying layer (120), the implantation (421) being carried out through the imprintable layer (110) comprising the subsequent patterns, the parameters of the implantation (421) being chosen in such a way as to form, in the underlying layer (120), implanted zones (122) and non-implanted zones, the non-Implanted zones defining the subsequent patterns and having a geometry that is dependent on the prior patterns.
Method for manufacturing light emitting element and light emitting element
A light emitting element manufacturing method of allowing a semiconductor laminated part which includes a light emitting layer and includes a group-III nitride semiconductor to grow on a substrate surface in which protrusions are formed in a period which is larger than an optical wavelength of light emitted from the light emitting layer and is smaller than a coherent length of the light, includes: forming a buffer layer along the substrate surface having the protrusions; allowing crystal nuclei which have facet surfaces and are separated from each other to grow on the buffer layer such that the crystal nuclei include at least one protrusion; and allowing a planarization layer to grow on the buffer layer in which the crystal nuclei are formed.
Compact light emitting diode chip and light emitting device having a slim structure with secured durability
A light emitting diode chip includes: a first conductive type semiconductor layer disposed on a substrate; a mesa disposed on the first conductive type semiconductor layer and including an active layer and a second conductive type semiconductor layer; an insulation layer covering the first conductive type semiconductor layer and the mesa, the insulation layer including at least one first opening exposing the first conductive type semiconductor layer and a second opening disposed on the mesa; a first pad electrode disposed on the insulation layer and electrically connected to the first conductive type semiconductor layer through the first opening; and a second pad electrode disposed on the insulation layer and electrically connected to the second conductive type semiconductor layer through the second opening. The first opening of the insulation layer includes a first region covered by the first pad electrode and a second region exposed outside the first pad electrode.
LIGHT-EMITTING DEVICE HAVING A PATTERNED SUBSTRATE AND THE METHOD THEREOF
A light-emitting device comprises a textured substrate comprising a plurality of textured structures, wherein the textured structures and the textured substrate are both composed of sapphire; and a light-emitting stack overlaying the textured substrate, comprising a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer, wherein one of the plurality of textured structures comprises a top portion and a bottom portion, wherein a first distance between a first projection of the top portion on the bottom portion and the bottom portion at one side is different from a second distance between a second projection of the top portion on the bottom portion and the bottom portion at another side.
LIGHT-EMITTING DEVICE
A light-emitting device includes: a rectangular shape with a 1.sup.st side, a 2.sup.nd side opposite to the 1.sup.st side, and a 3.sup.rd side connecting the 1.sup.st and the 2.sup.nd sides; a first electrode pad formed adjacent to the 3.sup.rd side; a second electrode pad formed adjacent to the 2.sup.nd side; a first extension electrode, extending from the first electrode pad in a direction away from the 3.sup.rd side and bended toward the 2.sup.nd side; and a second extension electrode, including a first and a second branches respectively extending from the second electrode pad; wherein a distance between the first electrode pad and the 3.sup.rd side is smaller than a distance between the second electrode pad and the 3.sup.rd side; wherein an end portion of the first branch includes a first arc bending to the 3.sup.rd side and a minimum distance between the first branch and the 1.sup.st side is smaller than a minimum distance between the second branch and the 1.sup.st side.
Light-emitting device having a patterned surface
A light-emitting device comprises a substrate having a top surface and a plurality of patterned units protruding from the top surface; and a light-emitting stack formed on the substrate and having an active layer with a first surface substantially parallel to the top surface, wherein one of the plurality of patterned units comprises a plurality of connecting sides constituting a polygon shape in a top view of the light-emitting device, the one of the plurality of patterned units comprises a vertex and a plurality of inclined surfaces respectively extending from the plurality of connecting sides, the plurality of inclined surfaces commonly join at the vertex in a cross-sectional view of the light-emitting device, the vertex being between the top surface of the substrate and the first surface of the active layer, and six of the plurality of patterned units forms a hexagon in the top view of the light-emitting device.
Light-emitting device
A light-emitting device is provided. The light-emitting device comprises a light-emitting stack comprising a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer. The light-emitting device further comprises a third semiconductor layer on the light-emitting stack and comprising a first sub-layer, a second sub-layer and a roughened surface, wherein the first sub-layer has the same composition as that of the second sub-layer, and the composition of the first sub-layer is with a different atomic ratio from that of the second sub-layer. A method for manufacturing the light-emitting device is also provided.
LIGHT EMITTING DIODE CHIP
A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1A2/(A1+A2)0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
SYSTEMS AND METHODS FOR PREPARING GaN AND RELATED MATERIALS FOR MICRO ASSEMBLY
The disclosed technology relates generally to a method and system for micro assembling GaN materials and devices to form displays and lighting components that use arrays of small LEDs and high-power, high-voltage, and or high frequency transistors and diodes. GaN materials and devices can be formed from epitaxy on sapphire, silicon carbide, gallium nitride, aluminum nitride, or silicon substrates. The disclosed technology provides systems and methods for preparing GaN materials and devices at least partially formed on several of those native substrates for micro assembly.